Search - Ram fpga

[Windows Develop] ram

Description: verilog写双端口存储器模型-a Model of Writing Double-Port RAM developed with Verilog
Platform: | Size: 1024 | Author: 杨艳 | Hits:

[VHDL-FPGA-Verilog] 基于FPGA的直接数字合成器设计

Description: 1、利用FLEX10的片内RAM资源，根据DDS原理，设计产生正弦信号的各功能模块和顶层原理图； 2、利用实验板上的TLC7259转换器，将1中得到的正弦信号，通过D/A转换，通过ME5534滤波后在示波器上观察； 3、输出波形要求：在输入时钟频率为16KHz时，输出正弦波分辨率达到1Hz；在输入时钟频率为4MHz时，输出正弦波分辨率达到256Hz； 4、通过RS232C通信，实现FPGA和PC机之间串行通信，从而实现用PC机改变频率控制字，实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
Platform: | Size: 21504 | Author: 竺玲玲 | Hits:

[VHDL-FPGA-Verilog] dpram_fpga

Description: 这是我用vhdl语言，在fpga内部做了一个双口ram的程序。我的邮箱：wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com
Platform: | Size: 2831360 | Author: 李伟 | Hits:

[Embeded-SCM Develop] fpga_ram_flash

Description: 一个fpga开发板的原理图，此板具有led灯、ram、flash-an fpga development board diagram, the board has led lights, ram, flash
Platform: | Size: 110592 | Author: xuyang | Hits:

[VHDL-FPGA-Verilog] FIFO_BEFORE

Description: 是基于fpga的FIFO乒乓操作，后面是与SDRAM接口的，这样主要方便sdram的刷新-fpga is based on the FIFO Table Tennis operation, and is behind SDRAM interface, This major update to the convenience sdram
Platform: | Size: 211968 | Author: eva | Hits:

[VHDL-FPGA-Verilog] ram

Description: 本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ensure that available.
Platform: | Size: 2048 | Author: nick | Hits:

[VHDL-FPGA-Verilog] Asynchronous_read_write_RAM

Description: Dual Port RAM Asynchronous Read/Write 经过modelsim仿真 -Dual Port RAM Asynchronous Read/Write through ModelSim Simulation
Platform: | Size: 1024 | Author: lianlianmao | Hits:

[MiddleWare] ram

Description: fpga中ram的vhdl的经典程序，适用于ALTERA公司器件-FPGA in VHDL ram the classic procedure, applicable to the company ALTERA devices
Platform: | Size: 1024 | Author: gcy | Hits:

[VHDL-FPGA-Verilog] sram_control

Description: verilog编写fpga与片外SRAM通信模块-Verilog FPGA with the preparation of SRAM chip communication module
Platform: | Size: 418816 | Author: 宇天 | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 双口RAM与PXI总线接口设计，包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
Platform: | Size: 1216512 | Author: zwt | Hits:

[Other] my_ram_vhdl

Description: how to infer ram for fpga altera xilinx
Platform: | Size: 1024 | Author: yusuf.abdullah | Hits:

[VHDL-FPGA-Verilog] connect20090223

Description: fpga从FIFO读数据并上传到双口ram中。-FPGA read data from the FIFO and upload it to dual-port ram Medium.
Platform: | Size: 468992 | Author: 张菁 | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 用VerilogHDL写的ram程序，对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
Platform: | Size: 271360 | Author: Blakeu | Hits:

[Other] FPGA-TWO-RAM

Description: 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
Platform: | Size: 4096 | Author: zhan | Hits:

[VHDL-FPGA-Verilog] ram

Description: ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
Platform: | Size: 1920000 | Author: mamou | Hits:

[VHDL-FPGA-Verilog] ug_ram

Description: RAM design for FPGA in verilog
Platform: | Size: 289792 | Author: NguyenViet | Hits:

[SCM] dual_ram

Description: FPGA和双端口RAM的DDS任意波形发生器的实现-FPGA and dual-port RAM of the DDS Arbitrary Waveform Generator
Platform: | Size: 513024 | Author: 刘磊 | Hits:

[VHDL-FPGA-Verilog] TLC5510_IIPRAM1

Description: FPGA控制双口RAM、实现TLC5510采样控制双口RAM读写！QUARTUS II8.0平台仿真验证通过，并在硬件上运行通过测试！-FPGA control of dual-port RAM, the realization of sampled-data control TLC5510 dual-port RAM read and write! QUARTUS II8.0 platform through simulation and hardware to run through the test!
Platform: | Size: 3439616 | Author: wangzhaohui | Hits:

[VHDL-FPGA-Verilog] ram

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a RAM memory.
Platform: | Size: 198656 | Author: Daisy | Hits:

[Software Engineering] RAM-FPGA-FFT

Description: 内嵌RAM的种类，在FFT中的应用,以及仿真验证及应用-Types of embedded RAM, the FFT application
Platform: | Size: 125952 | Author: Dean | Hits:

« 12 3 4 5 6 7 8 9 10 »

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Windows Develop] ram

[VHDL-FPGA-Verilog] 基于FPGA的直接数字合成器设计

[VHDL-FPGA-Verilog] dpram_fpga

[Embeded-SCM Develop] fpga_ram_flash

[VHDL-FPGA-Verilog] FIFO_BEFORE

[VHDL-FPGA-Verilog] ram

[VHDL-FPGA-Verilog] Asynchronous_read_write_RAM

[MiddleWare] ram

[VHDL-FPGA-Verilog] sram_control

[VHDL-FPGA-Verilog] RAM

[Other] my_ram_vhdl

[VHDL-FPGA-Verilog] connect20090223

[VHDL-FPGA-Verilog] RAM

[Other] FPGA-TWO-RAM

[VHDL-FPGA-Verilog] ram

[VHDL-FPGA-Verilog] ug_ram

[SCM] dual_ram

[VHDL-FPGA-Verilog] TLC5510_IIPRAM1

[VHDL-FPGA-Verilog] ram

[Software Engineering] RAM-FPGA-FFT

CodeBus www.codebus.net