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[VHDL-FPGA-Verilog] 8251_8055_verilog

Description: 8251和8055的verilog源码，可进行综合和仿真，是学习SOC的好资料！-8251 and 8055 verilog the source, and integrated simulation, SOC is a good learning information!
Platform: | Size: 13312 | Author: wind | Hits:

[VHDL-FPGA-Verilog] ARM7_verilog

Description: arm 7 verilog code used setup soc
Platform: | Size: 62464 | Author: chen | Hits:

[File Format] devider_design

Description: Abstract循序电路第一个应用是拿来做计数器((笔记) 如何设计计数器? (SOC) (Verilog) (MegaCore))，有了计数器的基础后，就可以拿计数器来设计除频器，最后希望能做出能除N的万用除频器。-Abstract The first application of sequential circuits are used to make counter ((notes) How to design a counter? (SOC) (Verilog) (MegaCore)), with the basic counter, you can use to design counters in addition to frequency, the last hope can make in addition to ten thousand with the exception of the N frequency.
Platform: | Size: 39936 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] mesh_dft

Description: 自己写一个关于维mesh结构的noc网络，verilog，仿真结果无误。-Write their own structure on the noc-dimensional mesh network, verilog, accurate simulation results.
Platform: | Size: 95232 | Author: 巴音 | Hits:

[VHDL-FPGA-Verilog] soc-gr0040-010309

Description: xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Platform: | Size: 406528 | Author: urga turg | Hits:

[VHDL-FPGA-Verilog] lariviere2008uclinux

Description: xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Platform: | Size: 252928 | Author: urga turg | Hits:

[Other] ADV7123_a

Description: adv7123 ram dac 10bit used always for hicolor fpga designs also soc systems
Platform: | Size: 309248 | Author: urga turg | Hits:

[Embeded-SCM Develop] pci.tar

Description: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transactions originating on the PCI bus, the other one handling transactions originating on the WISHBONE bus.
Platform: | Size: 13253632 | Author: yemao | Hits:

[VHDL-FPGA-Verilog] I2C

Description: I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
Platform: | Size: 6144 | Author: magic_andy | Hits:

[Other Embeded program] XPS_EMC

Description: Xilinx EDK中SOC使用外部存储器接口（EMC）的方法，并用ISP1581举例说明了如何与时分复用总线（8051单片机总线）设备进行连接，有Verilog源代码。-Xilinx EDK in SOC using external memory interface (EMC) methods, and examples of how ISP1581 with the TDM bus (8051 bus) devices to connect, there Verilog source code.
Platform: | Size: 59392 | Author: YongZhiLi | Hits:

[mpeg mp3] mpeg2_idct_hw

Description: 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
Platform: | Size: 10801152 | Author: 陳伯綸 | Hits:

[VHDL-FPGA-Verilog] AHBtoAPB

Description: amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
Platform: | Size: 165888 | Author: zhangyiyun | Hits:

[VHDL-FPGA-Verilog] mdio

Description: MDIO verilog RTL代码，SOC可以通过MDIO接口来访问外部PHY等慢速外设-MDIO verilog RTL code
Platform: | Size: 4096 | Author: dingyy | Hits:

[VHDL-FPGA-Verilog] soccccc

Description: 此文主要是基于VERILOG HDL 硬件实现的soc系统，主要功能是实现了基于Intel8051的滤波器系统-This article is based mainly on the soc VERILOG HDL hardware system, the main function is to achieve a filter system based on Intel8051
Platform: | Size: 192512 | Author: zhujie | Hits:

[Industry research] RK2728B_DATASHEET_brief_V0.3

Description: brief datasheet for RK2728 SoC
Platform: | Size: 305152 | Author: AleMaxx | Hits:

[VHDL-FPGA-Verilog] verilog

Description: vivado的led灯的学习程序，有兴趣学习soc的可以下载-the program for vivado study on SOC
Platform: | Size: 20480 | Author: fishman | Hits:

[LabView] SDRAM-and-FIFO-for-DE1-SoC-master

Description: Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
Platform: | Size: 11482112 | Author: kimluan | Hits:

[VHDL-FPGA-Verilog] Zet-1.3.1

Description: 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 interface .)
Platform: | Size: 2487296 | Author: VectorIII | Hits:

[assembly language] OExp13-SOC

Description: 使用Verilog编程搭建的测试平台，并连接了VGA等外设，使用MIPS汇编编写逻辑完成的躲避球小游戏(Use Verilog programming to build the test platform, and connect the VGA and other peripherals, using MIPS assembly to write logic to complete the dodge ball game)
Platform: | Size: 12132352 | Author: 日日夜夜 | Hits:

[VHDL-FPGA-Verilog] CAR_LI2

Description: DE1-SOC实验开发板和Verilog HDL语言的交互式程序作品，选择避障小车作为课程设计题目，并根据选题制定了如下设计需求： 1.能实现基本的避障小车功能，即躲避障碍，变速，计分，计时显示游戏开始、进行和结束画面； 2.能实现人机交互功能，玩家可通过外接键盘或DE1-SOC开发板自带按键和开关操作小车转向； 3.能通过VGA在显示屏中显示，并且能达到5Hz的刷新频率； 4.能实现自定义小车和障碍物皮肤的功能；(DE1-SOC experiment development board and Verilog HDL language interactive program works. Our group chooses obstacle avoidance car as curriculum design topic, and according to the selected topic, we have designed the following design requirements. 1. can achieve the basic obstacle avoidance car function, that is to avoid obstacles, speed, score, timing display games start, carry out and end the picture; 2. can achieve human-computer interaction function, players can use the external keyboard or DE1-SOC development board to carry button and switch to operate the car. 3. can be displayed in the display screen by VGA, and can reach the refresh frequency of 5Hz. 4. can realize the function of the custom car and the obstacle skin.)
Platform: | Size: 21147648 | Author: Sven111 | Hits:
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