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[VHDL-FPGA-Verilogstopwatch

Description: The program is written in verilog to accomplish functions of a stopwatch. It can be implemented in Xilinx FPGA spartan 3 board.
Platform: | Size: 2048 | Author: flyingwings | Hits:

[VHDL-FPGA-Verilogpaobiao

Description: 此上传的是在FPGA的spartan 3e系列开发板上面实现精准到 时、分、秒、百分秒的数字跑表的Verilog源代码。(This is uploaded on the FPGA Spartan 3E series development board to achieve precise time, minute, seconds, 100 seconds of digital stopwatch Verilog source code.)
Platform: | Size: 15143936 | Author: 木子桶 | Hits:

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