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硬件uart源程序verilog HDL,即相关文档-hardware UART Verilog HDL source, that the relevant documents
Update : 2025-02-17 Size : 335kb Publisher : 陈正一

this is a sample about UART transmission,it s default installation is D:\RedLogic\RCII_samples, and the software environment is quatrusII 5.0,it is usefull for studying UART.-this is a sample about UART transmission, it s default installation is D: RedLogicRCII_samples, and the software environment is quatrusII 5.0, it is usefull for studying UART.
Update : 2025-02-17 Size : 1.76mb Publisher : 王明

EPM1270和单片机的8080通讯接口,适合单片机与CPLD之间的高速通讯,verilog语言,QuartusII环境-EPM1270 and 8080 MCU communication interface for MCU and CPLD high-speed communication between, verilog language, QuartusII environment
Update : 2025-02-17 Size : 472kb Publisher : 汉武帝

uart VHDL code : include tx,rx,parity bit control
Update : 2025-02-17 Size : 13kb Publisher : byungchan

该工程用verilog编写,已通过串口调试助手调试通过,接收模块采用8倍波特率采样数据,有较好的滤波功能,在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complete the voluntary self-close feature.
Update : 2025-02-17 Size : 1.25mb Publisher : eric

DL : 0
Verilog实现的UART程序,用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
Update : 2025-02-17 Size : 22kb Publisher : Roy

用Verilog HDL语言编写的AT24C04程序,并用数码管显示,已经过测试,很好用-With the Verilog HDL language of the AT24C04 procedures and use digital tube display, has been tested, very good to use--
Update : 2025-02-17 Size : 11kb Publisher : iyandy

Verilog HDL写的实现UART收发程序-Realization of Verilog HDL UART receive written procedures
Update : 2025-02-17 Size : 693kb Publisher : xiong
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