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[Crack Hack] aes_encryption

Description: aes加密算法的VHDL代码实现，在FPGA芯片上调试过-aes encryption algorithm realize the VHDL code in FPGA chips upward tried
Platform: | Size: 6144 | Author: stym_001 | Hits:

[VHDL-FPGA-Verilog] CoreAES128

Description: Full AES Simulation Code
Platform: | Size: 1339392 | Author: esl | Hits:

[Crack Hack] mini_aes_latest[1].tar

Description: AES 加解密 代码, 有文档说明，testbench-AES encoding decoding source code in HDL
Platform: | Size: 233472 | Author: wangbin | Hits:

[Algorithm] AES

Description: This the source code of AES algorithm which is used in network security.-This is the source code of AES algorithm which is used in network security.
Platform: | Size: 10240 | Author: Krupesh | Hits:

[source in ebook] 63535312DCTofJPEG

Description: 用verilog代码实现JPEG压缩编码过程中的DCT模块，用移位加法实现了乘法-Verilog code using JPEG compression encoding process to achieve the DCT module, with the shift to achieve the multiplication addition
Platform: | Size: 2048 | Author: jiang | Hits:

[Crack Hack] systemcaes_latest.tar

Description: 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
Platform: | Size: 83968 | Author: lxc | Hits:

[Crack Hack] aes_crypto_core_latest.tar

Description: verilog code for aes
Platform: | Size: 1927168 | Author: vani | Hits:

[Software Engineering] fifo_template

Description: aes code with fifo control to memory
Platform: | Size: 9216 | Author: allen | Hits:

[matlab] aes

Description: Matlab code to simulation the wireless channel type.This is the most common case called Rayleigh channel.And in the frequency selective channel.
Platform: | Size: 8192 | Author: allen | Hits:

[Crack Hack] aes_thesis_v1.0

Description: AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
Platform: | Size: 386048 | Author: 蕭嵎之 | Hits:

[VHDL-FPGA-Verilog] aescore

Description: 基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
Platform: | Size: 195584 | Author: 李华 | Hits:

[Program doc] cunzip

Description: AES CODE FOR DECRYPTION
Platform: | Size: 12288 | Author: sruthi | Hits:

[Program doc] Rijndael

Description: AES USING PICOBLAZE CODE
Platform: | Size: 17408 | Author: sruthi | Hits:

[Crack Hack] LIP1611CORE_AES128_SEC_UWB

Description: AES 128 Synthesisable RTL code
Platform: | Size: 5584896 | Author: jc | Hits:

[VHDL-FPGA-Verilog] AES!

Description: AES algorithm very good code tested in xilinx ise tool
Platform: | Size: 9216 | Author: hr | Hits:

[Embeded-SCM Develop] FPGA

Description: 此课件是基于FPGA的加密芯片设计实例，DES的FPGA实现，包括DES加密算法简述，DES的伪代码描述，设计流程，运算电路模型设计，算法程序设计 -The courseware is based on the FPGA chip design example of encryption, DES for FPGA implementation, including the DES encryption algorithm briefly, DES pseudo-code description of the design process, operation circuit modeling, algorithm programming
Platform: | Size: 3852288 | Author: betty | Hits:

[VHDL-FPGA-Verilog] aes

Description: aes的加密解密算法的源代码以及测试源代码和仿真结果图-aes encryption decryption algorithm source code and test source code and simulation results map
Platform: | Size: 2973696 | Author: cong | Hits:

[VHDL-FPGA-Verilog] aes-vhdl

Description: this file contains vhdl code for aes
Platform: | Size: 119808 | Author: baby | Hits:

[Crack Hack] aes_thesis_v1.0

Description: aes code in verilog vhdl language which is very useful.
Platform: | Size: 385024 | Author: sur22 | Hits:

[VHDL-FPGA-Verilog] aes-master

Description: aes master by vhdl code and decode
Platform: | Size: 68608 | Author: Nguyen Nam | Hits:
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