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[VHDL-FPGA-Verilog] DDS-320-modu

Description: 在采用 320x240 屏的设计实验箱上运行，产生正弦波，调幅调频波形，扫频。-320x240 screen using the design of experiments to run me generate sine wave, AM FM waveforms, sweep.
Platform: | Size: 1250304 | Author: hangyinli | Hits:

[Software Engineering] ZX

Description: 本系统以51单片机及FPGA为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成-The system of 51 single-chip and FPGA for the control of the core module by the sinusoidal signal, power amplifier module, AM (AM), frequency modulation (FM) module, digital keying (ASK, PSK) signal modules and test modules
Platform: | Size: 105472 | Author: 123 | Hits:

[VHDL-FPGA-Verilog] dds_9760_OK

Description: ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequency of up to 25M
Platform: | Size: 5096448 | Author: 李逵 | Hits:

[matlab] matlabfile

Description: many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation-many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation
Platform: | Size: 444416 | Author: allen | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

[Driver Develop] fpga

Description: VHDL写的fpga程序，可产生三角波，方波据此波，正弦波，可实现任意频偏的调频，调相，调幅-Fpga write VHDL program can generate triangle wave, square wave accordingly wave, sine wave, can achieve any frequency offset of the FM, PM, AM
Platform: | Size: 12225536 | Author: 陈俊涵 | Hits:

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

Description: 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
Platform: | Size: 6747136 | Author: 王展 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
Platform: | Size: 546816 | Author: WSong | Hits:

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