Search - VHDL CCD

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[VHDL-FPGA-Verilog] CCDOUT DL : 0: CCD信号由于其特殊性,一般不能有信号源产生,本程序采用VHDL语言，以ISE为开发平台，产生了模拟CCD信号的数字信号，只需经DA转换便能实现-CCD signal because of its uniqueness, not generally produce a signal source, the procedures used VHDL, ISE as a development platform, have CCD signal simulation of digital signal only after DA conversion can be achieved
Update : 2025-02-17 Size : 1.04mb Publisher : 刘小军
[OS program] DE2_CCD DL : 0: DE2环境中开发CCD的资料！网上下的，应该可以用！-DE2 development environment CCD data! Online, and should be able to use!
Update : 2025-02-17 Size : 358kb Publisher : qiu
[Software Engineering] SOC_CCD DL : 0: 基于SOC的线阵CCD图像采集单元设计.pdf-SOC based on the linear array CCD image acquisition unit design. Pdf
Update : 2025-02-17 Size : 495kb Publisher : 王剑雨
[Documents] 1 DL : 0: 一篇关于高分辨CCD图像采集系统的实现论文-An article on high-resolution CCD image acquisition system for papers
Update : 2025-02-17 Size : 153kb Publisher : 高嵩
[VHDL-FPGA-Verilog] CCD_TCD1205 DL : 0: 用VHDL语言实现CCD图象采集系统，针对TCD1205线阵CCD传感器-Using VHDL language CCD image acquisition system for TCD1205 linear array CCD sensors
Update : 2025-02-17 Size : 8kb Publisher : xujingjing
[Software Engineering] CPLD_CCD DL : 0: 实现基于CPLD的CCD采集系统设计源码-CPLD-based design of the CCD acquisition system source
Update : 2025-02-17 Size : 65kb Publisher : 路伟希
[VHDL-FPGA-Verilog] DE2_CCD_CV DL : 0: altera DE2 实验板专用 CCD驱动-altera DE2 board dedicated CCD driver
Update : 2025-02-17 Size : 11.5mb Publisher : 李军
[VHDL-FPGA-Verilog] ICX229AL DL : 0: SONY公司出品的黑白CCD（44万像素）ICX229的驱动信号产生程序-SONY company produced black-and-white CCD (44 megapixels) ICX229 the drive signal generation process
Update : 2025-02-17 Size : 12.53mb Publisher : 肖雅文
[2D Graphic] DE2_CCD_binary DL : 0: verilog DE2 binary image (form CCD to VGA) output
Update : 2025-02-17 Size : 4.04mb Publisher : eknngx
[Picture Viewer] DE2_CCD DL : 0: CCD的驱动程序，用于DE2板，可显示出摄像头采集的图像数据。-CCD driver for the DE2 board, show the camera s image data collection.
Update : 2025-02-17 Size : 1.29mb Publisher : churan
[VHDL-FPGA-Verilog] CPLDforCCD DL : 0: 基于CPLD的光积分时间可调线阵CCD驱动电路设计-CPLD-based optical integration time adjustable linear array CCD Drive Circuit Design
Update : 2025-02-17 Size : 409kb Publisher : 赵晖
[VHDL-FPGA-Verilog] ICX408AL7.5M DL : 0: 基于CPLD的CCD驱动程序源码，本人已经测试过，配合单片机控制，就能实现CPLD对CCD的驱动控制和曝光控制-CPLD based on the CCD driver source, I have been tested with single-chip control, you can achieve CPLD driver for CCD control and exposure control
Update : 2025-02-17 Size : 533kb Publisher : linhao
[Embeded-SCM Develop] CCD DL : 0: 本程序通过CPLD不同的波形来控制CCD的驱动-This procedure of the waveform through the CPLD to control the different CCD driver
Update : 2025-02-17 Size : 235kb Publisher : sunjun
[VHDL-FPGA-Verilog] CCD DL : 0: 用TCD1501D驱动器产生CCD驱动的6个输出信号RS、CP、SP、SH以及Φ1、Φ2脉冲-Produced by CCD drive TCD1501D driven six output signal RS, CP, SP, SH, and Φ1, Φ2 pulse
Update : 2025-02-17 Size : 147kb Publisher : 吕开华
[Special Effects] CCD DL : 0: 对ccd图像进行解码采集，并通过VGA输出-Ccd image decoding of the collection, and through the VGA output
Update : 2025-02-17 Size : 3kb Publisher : charles
[Embeded-SCM Develop] CCD_Verilog_1014 DL : 0: 数据采集系统中用CPLD驱动CCD的驱动程序，用于对CPLD编程。-Data Acquisition System with CCD drive CPLD driver for CPLD programming.
Update : 2025-02-17 Size : 6kb Publisher : lihui
[Other] tcd103c DL : 0: tcd103cccd drive progammtcd103c ccd drive progamm ccd drive progammccd drive proga-ccd drive progammccd drive progammccd drive progammccd drive progammccd drive progammccd drive progamm
Update : 2025-02-17 Size : 199kb Publisher : 胡建华
[Special Effects] AD9826 DL : 0: 图像采集传感器CCD专用的AD转换器-AD9826驱动程序，VHDL语言。-CCD image acquisition sensor dedicated AD converter-AD9826 driver, VHDL language.
Update : 2025-02-17 Size : 1kb Publisher : 李云
[VHDL-FPGA-Verilog] DE2_LCM_CCD DL : 0: 在de2FPGA开发板上实现视频的采集，以及播放~~verilog代码希望对大家有所帮助-CCD to capture video sent to SDRAM LCM to controller LCD LCD to display the picture~
Update : 2025-02-17 Size : 4.43mb Publisher : Wu
[Software Engineering] ccd-nios DL : 0: 提出一种面阵CCD的驱动和数据采集系统的设计方案，采用了nios和cpld的组合。-Presents a planar array CCD drive and data acquisition system design, using a combination of nios and cpld
Update : 2025-02-17 Size : 271kb Publisher :

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