Search - VHDL DA

[VHDL-FPGA-Verilog] DDS_信号源

Description: dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
Platform: | Size: 5324098 | Author: wuyunzheng | Hits:

[Windows Develop] ise6.3ad0809_test

Description: 本程序为VHDL语言编写的ADC0809的采样程序并用DA0800恢复-procedures for the preparation of the VHDL ADC0809 the sampling procedures used to restore DA0800
Platform: | Size: 4096 | Author: tmx | Hits:

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

[Embeded-SCM Develop] adda_spi

Description: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE- based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Platform: | Size: 66560 | Author: zeng xuan | Hits:

[Other] VHDL_and_FPGA_design

Description: 本书的)4一个持色是从FPGA设计的角度出发．别祈了vHD巳语法的特点以及它们的正确使用方沈，将初学者在运用vHDL语吉进行FPrjA设计中会遇到的疑惑，— 点拨清楚。并纪合作者的多年FPGA设计经验，讲述厂许多EDA设计思想v并贯穿全书始终。 -the book) with a four color from the FPGA design point of view. Other vHD already have a prayer of the characteristics of grammar and the correct use of them, Shen Fang, beginners in the use of the phrase Kyrgyzstan vHDL for FPrjA design encounter puzzled-Inspiration clear. SUMMARY collaborators and FPGA design experience for many years, on many plants v EDA design ideas and has always run through the whole book.
Platform: | Size: 7979008 | Author: haopowan | Hits:

[Communication-Mobile] GetRomData

Description: 生成4种方式的DDS输出的读表程序的VHDL源代码程序。-four ways generation of DDS output of the meter reading procedures VHDL source code procedures.
Platform: | Size: 176128 | Author: zhao | Hits:

[VHDL-FPGA-Verilog] DAC0832

Description: 由VHDL 语言实现的DA0832器利用的是QUARTUES环境已经得到验证-By the VHDL language uses the DA0832 is QUARTUES environment has been tested
Platform: | Size: 173056 | Author: df | Hits:

[MiddleWare] da8

Description: TLV5628 8位da的vhdl控制程序，以验证-TLV5628 8 bit da the VHDL control procedures to verify
Platform: | Size: 1024 | Author: gcy | Hits:

[File Format] ram_da

Description: 将AD转换得到的八位数据存入RAM，存1000个点，然后通过串行DA读出，DA芯片为TLV5638,AD芯片为tlc0820ac，RAM为FM25L16-AD conversion will be the eight data into RAM, keep 1000 points, and then read out through the DA serial, DA chips for the TLV5638, AD chips for tlc0820ac, RAM for FM25L16
Platform: | Size: 650240 | Author: 王力 | Hits:

[MiddleWare] da

Description: 实现da转换功能，不是很强大。。。还望多多指正-Realize da conversion feature, not very powerful. . . Also look a lot correction
Platform: | Size: 57344 | Author: 小超 | Hits:

[Books] da

Description: 一个8位da转换程序，希望对广大新手有所帮助。
Platform: | Size: 1024 | Author: tian | Hits:

[VHDL-FPGA-Verilog] 5050PWM_V54

Description: FPGA 实现基于ISA接口的3路编码器计数，和3路PWM/DA输出编码器计数包括倍频、鉴相 PWM实现12位分辨率-FPGA-based ISA interface 3 Road encoder counts, and 3-way PWM/DA output encoder counts, including frequency doubling, phase PWM realize 12-bit resolution
Platform: | Size: 1084416 | Author: 吴波 | Hits:

[VHDL-FPGA-Verilog] VHDL_da

Description: 大量的VHDL程序实例，供大家参考学习，是学习VHDL的好书。-VHDL procedures for a large number of examples for your reference
Platform: | Size: 2980864 | Author: 达 | Hits:

[VHDL-FPGA-Verilog] DA

Description: 利用可编程逻辑器件进行D/A和A/D控制接口的设计 -The use of programmable logic device to carry out D/A and A/D control interface design
Platform: | Size: 13553664 | Author: 帅哥 | Hits:

[VHDL-FPGA-Verilog] 01.ISE8.2

Description: 这个是我用的合众达试验箱里面的资料。合众达试验箱里面集成的是xilinx的virtex4，这个是在ise环境中审计的程序，包括led,da/ad转换实验，键盘实验，以及rtc读取和lcd显示等。-vhdl programs that used by xilinx virtex4
Platform: | Size: 14129152 | Author: 肖姗姗 | Hits:

[VHDL-FPGA-Verilog] DA

Description: FPGA控制DAC2807的源文件，Verilog。附有简单文档-FPGA control DAC2807 source, Verilog. A simple document
Platform: | Size: 1629184 | Author: 柴佳 | Hits:

[VHDL-FPGA-Verilog] ADPCM

Description: APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
Platform: | Size: 1327104 | Author: jiajunxian | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

[VHDL-FPGA-Verilog] da

Description: FIR滤波器利用串行DA算法实现16阶的，直接可用，用VHDL编程-Serial DA FIR filter algorithm using 16 bands, directly available, VHDL programming
Platform: | Size: 215040 | Author: 赵擎天 | Hits:

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

Description: 关于FPGA的提高篇，Verilog HDL语言写的，包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classic procedure
Platform: | Size: 1181696 | Author: chenfeihu | Hits:

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[VHDL-FPGA-Verilog] DDS_信号源

[Windows Develop] ise6.3ad0809_test

[VHDL-FPGA-Verilog] vhdl程序例子

[Embeded-SCM Develop] adda_spi

[Other] VHDL_and_FPGA_design

[Communication-Mobile] GetRomData

[VHDL-FPGA-Verilog] DAC0832

[MiddleWare] da8

[File Format] ram_da

[MiddleWare] da

[Books] da

[VHDL-FPGA-Verilog] 5050PWM_V54

[VHDL-FPGA-Verilog] VHDL_da

[VHDL-FPGA-Verilog] DA

[VHDL-FPGA-Verilog] 01.ISE8.2

[VHDL-FPGA-Verilog] DA

[VHDL-FPGA-Verilog] ADPCM

[VHDL-FPGA-Verilog] dds_final

[VHDL-FPGA-Verilog] da

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

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