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Description: Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
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Size: 249856 |
Author: 飞扬 |
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Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
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Size: 776192 |
Author: 张涛 |
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Description: 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
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Size: 1024 |
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Description: DDR RAM控制器的VHDL源码,实现平台是Lattice FPGA,功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
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Size: 677888 |
Author: 钟方 |
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Description: XILINX的FPGA实现的双口ram源码,可作为dsp\SDRAM和pci桥接作用,可直接使用,实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
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Size: 19456 |
Author: 朱效志 |
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Description: 在信息处理中,特别是实时视频图像处理中,通常都要对实现视频图像进行处理,而这首先必须设计大容量的存储器,同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点,但因SDRAM的控制结构复杂,常用的方法是设计SDRAM通用控制器,这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此,笔者在研究有关文献的基础上,根据具体情况提出一种独特的方法,实现了对SDRAM的控制,并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转,截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing.
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Size: 137216 |
Author: 赵明玺 |
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Description: FPGA连接SDRAM的源程序,VHDL语言实现,功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
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Size: 732160 |
Author: young |
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Description: 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.-FPGA-based SDRAM controller design and realization, but also better le.
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Size: 69632 |
Author: rubyshirial |
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Description: FPGA读写SDRAM的实例,可以当作IPcore来添加,非常有价值的的程序。-FPGA examples SDRAM read and write, can be used as IPCore to add, a very valuable process.
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Size: 21392384 |
Author: 陈泸华 |
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Description: verilog语言
利用FPGA控制SDRAM,相信很多朋友都需要
快下载吧-control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
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Size: 19456 |
Author: 杜菲 |
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Description: verilog 代码,读写SDRAM 不带仿真,需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
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Size: 19935232 |
Author: ch |
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Description: Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL
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Size: 811008 |
Author: machenghai |
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Description: 这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
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Size: 2171904 |
Author: jyb |
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Description: FPGA读写SDRAM的VHDL程序,已经测试过-FPGA to read and write the VHDL procedures SDRAM have been tested
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Size: 5120 |
Author: 钟灿武 |
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Description: verilog 128位 突发4. sdr fpga控制器-verilog 128 bit unexpected 4. sdr fpga controller
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Size: 119808 |
Author: pudnrtest |
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Description: 使用Verilog控制美光CMOS图像处理器,并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
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Size: 36864 |
Author: NOOW |
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Description: 一个项目工程,硬件包含XINLINX FPGA,配置FLASH,串口,SDRAM,与以太网芯片DM9000A,实现数据采集,以太网传输,电路验证完全正确,请放心使用,SPARTAN 3E 的BGA引脚320个,不容易布板,可以参考使用的。要FPGA实现网络通信也可以参考电路,B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SDRAM, and Ethernet chips DM9000A, data acquisition, Ethernet transmission, circuit verification is completely correct, please rest assured that the use of, SPARTAN 3E' s 320-pin BGA it is not easy layout, you can reference to use. To achieve network communication FPGA also can refer to the circuit, because the product upgrades so publicly.
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Size: 915456 |
Author: rong |
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Description: SDR SDRAM控制器,FPGA vhdl代码-SDR SDRAM Controller
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Size: 718848 |
Author: |
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Description: SDR SDRAM 控制器的源代码 altera公司的-source code from altera
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Size: 717824 |
Author: wela |
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Description: 基于FPGA的SDRAM控制器设计及应用硕士论文-SDRAM controller design FPGA based
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Size: 3163136 |
Author: connie |
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