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[Technology Management] VLSI-test-technology

Description: 中国科学院计算所李晓维研究员的VLSI测试与可测试性设计讲义-Calculated by the Chinese Academy of Sciences researcher Li Xiaowei of VLSI testing and design for testability notes
Platform: | Size: 3556352 | Author: 杨涛 | Hits:

[source in ebook] VLSI__TEST

Description: 中科院研究生院VLSI测试课程课件，VLSI TEST PRINCIPLES AND ARCHITECTURES Design for Testability，搞好测试必看。-Chinese Academy of Sciences, Graduate School of VLSI test Courseware, VLSI TEST PRINCIPLES AND ARCHITECTURESDesign for Testability, do a good job in testing a must-see.
Platform: | Size: 5425152 | Author: xzy | Hits:

[Other] 9-testing

Description: An overview of VLSI testing
Platform: | Size: 73728 | Author: Viki | Hits:

[Mathimatics-Numerical algorithms] nwcrossd

Description: implementation of genetic algorithm levelising the combinational circuits for vlsi testing purpuse it will work for both combinational and sequential circuits
Platform: | Size: 22528 | Author: sujitha | Hits:

[VHDL-FPGA-Verilog] Combinational_Testing

Description: testing details for VLSI based digital ic
Platform: | Size: 93184 | Author: kkkk | Hits:

[Software Engineering] CEMENT-BASE

Description: VLSI Design presents state-of-the-art papers in VLSI design, computer-aided design, design analysis, design implementation, simulation and testing. Theory as ... VLSI Research
Platform: | Size: 362496 | Author: sakthivel | Hits:

[File Format] digital_systems_testing_and_testable_design_abram

Description: digital vlsi testing book. its vey useful book
Platform: | Size: 6348800 | Author: Jyoti Garg | Hits:

[Embeded-SCM Develop] Methods-for-Memory-Testing

Description: regarding vlsi testing
Platform: | Size: 2409472 | Author: Jyoti Garg | Hits:

[assembly language] FTVT_Lab1

Description: Fault tolerant computing and VLSI testing assignment
Platform: | Size: 14336 | Author: Chinmayi | Hits:

[File Format] 09_TESTINGINTRO

Description: vlsi testing in front end and back end-vlsi testing in front end and back end
Platform: | Size: 914432 | Author: yamunarani | Hits:

[Software Engineering] test.in

Description: introduction to vlsi testing
Platform: | Size: 475136 | Author: sathya | Hits:

[Software Engineering] 01Intro0602

Description: VLSI Testing and Design for Testability
Platform: | Size: 113664 | Author: praneetraj | Hits:

[Linux driver] PODEM

Description: VLSI Testing 中 podem 算法的实现。用C++来编写。运行环境在linux 的 g++上有实习-VLSI PODEM Algorithm using C++
Platform: | Size: 16384 | Author: Jianwei Qiu | Hits:

[Other] VLSI-Testingnotes2

Description: VLSI Testing , which gives good explanation about testing in VLSI , with good examples
Platform: | Size: 439296 | Author: rohit | Hits:

[Documents] 4.-Fault-modeling-and-simulation

Description: This PPT describes Fault modeling and simulation in VLSI testing
Platform: | Size: 1174528 | Author: slso | Hits:

[VHDL-FPGA-Verilog] bist 2017 paper

Description: A new low-power (LP) scan-based built-in selftest (BIST) technique is proposed based on weighted pseudorandom test pattern generation and reseeding. A new LP scan architecture is proposed, which supports both pseudorandom testing and deterministic BIST. During the pseudorandom testing phase, an LP weighted random test pattern generation scheme is proposed by disabling a part of scan chains.
Platform: | Size: 1568768 | Author: Maddy619 | Hits:

[Documents] Atalanta-M-2.0

Description: AUTOMATIC TEST PATTERN GENERATION TOOLBOX FOR VLSI TESTING AND FAULT COVERAGE MEASUREMENT
Platform: | Size: 107520 | Author: JAYANTHIRAG | Hits:

[Education soft system] Technology Mapping : VLSI

Description: Input format: GraphML : graphml format contains nodes and edges of the graph. Output format: Testing: Done by VLSI TEAM
Platform: | Size: 58957 | Author: nalevihtkas | Hits:

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