Description: 利用拨码开关为可编程器件输入读写命令和相应的地址、数据，8051读入可编程器件设定的命令字并根据可编程器件的设置进行读写操作，读出来的数据通过P0输出给可编程器件，并由可编程器件控制七段数码管显示。(Verilog+单片机)-DIP switch for the use of programmable devices to read and write command input and the corresponding address, data, read into the programmable device 8051 set the word order and in accordance with programmable device settings for read and write operations, read out the data through P0 output to the programmable device, programmable device controlled by the Seven-Segment LED display. (Verilog+ Singlechip) Platform: |
Size: 3072 |
Author:辛颖 |
Hits:
Description: 这是一个verilog HDL 语言的例子，在CPLD器件EPM240上实现了 RS232协议、按键处理、LED数码管显示和每秒加1数码显示。使用quartus ii 7.0 以上打开.-This is an example of verilog HDL language in the CPLD device EPM240 achieved RS232 agreement, deal button, LED digital tube display and digital display plus 1 per second. Quartus ii 7.0 use more than open. Platform: |
Size: 521216 |
Author:白蚁 |
Hits:
Description: --- --- --- -Verilog--- --- ----
This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor.
Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize.--------------------Verilog----------------
This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor.
Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize. Platform: |
Size: 168960 |
Author:Sami |
Hits:
Description: 使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。-Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice. Platform: |
Size: 1899520 |
Author:biyuming |
Hits:
Description: 本设计介绍了一种利用可编程器件FPGA，应用VHDL和Verilog两种语言实现VGA（video graphic array）图像控制器的设计方案，通过采用FPGA（Filed programmable Gate Array）芯片设计和VGA接口将要显示的数据直接送到显示器主要设计出一些重要图像的各个功能模块，并且通过系统仿真软件和FPGA硬件实验板来验证设计结果的正确性。
本设计首先对FPGA芯片和图像的显示原理以及VGA显示器的控制方法做了清晰的阐述，然后在此基础上使用FPGA设计VGA图像的显示控制的各种方案，实现彩条、中文汉字、图形、汉字动画等图像在显示器上的显示，完成各种各样图像的变化，达到设计的基本要求。
-This design has introduced a kind of make use of the programmable device FPGA, the application of the two languages and Verilog VHDL realize VGA (video graphic array) image controller design scheme, by the use of the FPGA (Filed programmable Gate array) chip design and VGA interface that is to be revealed data directly to the main display design out some important image of each function module, and through the system simulation software and hardware board to verify the FPGA design of the accuracy of the results.
The design of FPGA chips, and the first image display principle and VGA display control methods of clear paper, and then based on this use of the image and the FPGA design VGA display control solutions, realize the striped, Chinese characters, graphics, animation, and other Chinese characters on a display image display, finish all kinds of image changes, to design the basic demand.
Platform: |
Size: 5575680 |
Author:郭晓阳 |
Hits:
Description: 基于verilog语言的，FPGA程序，实现频率计与数码管显示功能，转换频率48M，精度1Hz，量程1Hz~9999Hz，有欠频率和超频率提示，精度与量程可随外部设备改变而改变，在EP1C3T100C8上亲测通过-Based verilog language, FPGA procedures to achieve frequency meter with digital display, switching frequency 48M, precision 1Hz, range 1Hz ~ 9999Hz, frequency and ultra-frequency tips lacks accuracy and range can vary with changes in the external device, in EP1C3T100C8 measured by the pro- Platform: |
Size: 4190208 |
Author:FT_Young |
Hits:
Description: 滚动彩条显示。通过HDMI接口输出单色图案、渐变色、单幅马赛克、动态马赛克等图案。使用Verilog，基于Xilinx Spartan-6 LX45器件，AX6045开发板(Scroll bar display. Through HDMI interface output monochrome pattern, gradient color, single mosaic, dynamic mosaic and other patterns. Using Verilog, based on Xilinx spartan-6 LX45 device, ax6045 development board) Platform: |
Size: 3228672 |
Author:听丨雨 |
Hits:
Search - Verilog Display Device