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Description: 这是PCM电话传输系统模型的verilog程序,是一个modlesim开发环境下的工程文件,并有波形仿真结果.-PCM telephone transmission system Verilog model of procedures is a modlesim development environment under the project documents, and a waveform simulation results.
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Size: 47092 |
Author: way |
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Description: 大型嵌入式设备FPGA程序,verilog HDL语言,实现DLL和PCM码流分流。-large embedded FPGA procedures, Verilog HDL, DLL and achieve PCM stream diversion.
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Size: 3184 |
Author: chenlei |
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Description: pcm 接口的源代码,有参考价值~verilog语言编写
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Size: 3939 |
Author: 张丰 |
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Description: 线性PCM到A律pcm的Verilog编码源程序
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Size: 1031 |
Author: 李果霖 |
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Description: 该程序设计了一个产生PCM码流时序信号的模块,他包括输入端CLK,SET及输出端Q1,Q2,Q3-the program have designed a PCM signal timing modules, including the CLK input, and output SET Q1, Q2 and Q3
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Size: 8192 |
Author: 许嘉璐 |
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Description: 这是PCM电话传输系统模型的verilog程序,是一个modlesim开发环境下的工程文件,并有波形仿真结果.-PCM telephone transmission system Verilog model of procedures is a modlesim development environment under the project documents, and a waveform simulation results.
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Size: 47104 |
Author: way |
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Description: 大型嵌入式设备FPGA程序,verilog HDL语言,实现DLL和PCM码流分流。-large embedded FPGA procedures, Verilog HDL, DLL and achieve PCM stream diversion.
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Size: 3072 |
Author: chenlei |
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Description: 预测编码dpcm 的verilog代码,此文件为V文件-predictive coding dpcm verilog code of this file documents for V
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Size: 1024 |
Author: 万明 |
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Description: pcm 接口的源代码,有参考价值~verilog语言编写-pcm interface source code, have reference value ~ verilog language
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Size: 4096 |
Author: 张丰 |
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Description: 线性PCM到A律pcm的Verilog编码源程序-Linear PCM to the Verilog code pcm A law source
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Size: 1024 |
Author: 李果霖 |
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Description: 实现了数字通信系统中PCM编码,用Verilog硬件描述语言编程在FPGA上实现的。-Achieved in the PCM coded digital communication system, using Verilog hardware description language programming implemented on the FPGA.
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Size: 4096 |
Author: 李欣 |
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Description: 本程序实现了PCM30的帧同步和失步检测,采用verilog编程,包含了工程文件。-This procedure achieved PCM30 frame synchronization and detection step, using verilog programming, includes the project file.
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Size: 45056 |
Author: chenjian |
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Description: 实现了verilog语言的pcm编码功能-verilog pcm module
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Size: 1024 |
Author: 张只是 |
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Description: Verilog语言的同步帧检测模块,适用于pcm通信系统,本模块可检测的同步帧为100110-The synchronization frame detection module implemented use Verilog language,for pcm communication system, the module can detect synchronization frame for 10,011,011
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Size: 1024 |
Author: LEE |
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Description: 用verilog语言实现PCM模块功能(pcm发音)-PCM module function (pcm pronunciation) with verilog language
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Size: 1788928 |
Author: 张喆 |
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Description: verilog 的代码,是pcm采编器,经过验证的,可以用,并且附带上testbench文件。-The verilog code pcm editorial, proven, you can use, and comes on the testbench file.
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Size: 1024 |
Author: 张伟 |
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Description: verilog的pcm实现,程序书写规范,值得学习。(The PCM implementation of Verilog, the specification of program writing, is worth learning.)
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Size: 5366784 |
Author: wanna丶
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Description: Verilog PCM MuxDemux example
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Size: 3072 |
Author: smn1380 |
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Description: 在FPGA开发板上实现通信中PCM30/32系统的时分复用,编码,解码,串并行转换,以及同步识别(On the FPGA development board, we complete time division multiplexing, encoding, decoding, serial parallel conversion and synchronization identification of PCM30/32 system in communication.)
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Size: 724992 |
Author: 莱恩哈特01 |
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Description: use verilog to trans PDM to PCM signal,use vivado
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Size: 7237632 |
Author: hcccc1117 |
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