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[Other resource] fpgasong

Description: 以verilog HDL 语言编写的一首歌曲，可供初学者借鉴-to Verilog HDL language of a song, draw for beginners
Platform: | Size: 951 | Author: 王海 | Hits:

[VHDL-FPGA-Verilog] fpgasong

Description: 以verilog HDL 语言编写的一首歌曲，可供初学者借鉴-to Verilog HDL language of a song, draw for beginners
Platform: | Size: 1024 | Author: 王海 | Hits:

[VHDL-FPGA-Verilog] song

Description: 歌曲是什么名字我忘了，代码仅提供一个用verilog编写音乐的模板，想编写什么音乐就往里边套用格式就行了。 本程序无法用软件实现仿真音乐效果，当然可以仿真波形输出，真实音乐效果需用开发板仿真才行，所以就不附仿真图了 用quartus2软件打开即可。 -What are the names of songs I forgot, the code with verilog only prepared to provide a template for the music, what music would like to prepare to apply往里边format will do. This procedure can not use simulation software to achieve the effect of music, of course, can be simulated waveform output, the real music simulation results need to do development board, it is not attached to the use map quartus2 simulation software can open.
Platform: | Size: 1024 | Author: 杨帆 | Hits:

[VHDL-FPGA-Verilog] song

Description: 基于FPGA的简易电子琴琴键发音，使用语言Verilog。-FPGA-based electronic organ keyboard sounds simple, use the language Verilog.
Platform: | Size: 317440 | Author: zhailei | Hits:

[VHDL-FPGA-Verilog] music

Description: 用FPGA实现的歌曲“梁祝”播放程序，用Verilog HDL编写-FPGA implementation with the song " Butterfly Lovers" player, written with Verilog HDL
Platform: | Size: 312320 | Author: 谭德 | Hits:

[VHDL-FPGA-Verilog] switch

Description: 该模块是一个基于verilog的脉冲触发高低电平保持的模块，同时包含了消抖的功能。 主要是针对现今许多开发板上开关是弹簧式的手按下去为低电平，手一松就变成了高电平。只要按一次松开后，模块就能自动输出一个低电平。（板子上的开关正常情况为高电平） 同时消抖部分在输入clk为50Mhz的时候可以延迟21ms来判断是否为开关按下-The module is based on verilog pulsed high-low to keep the trigger module includes both debounce function. Mainly on the development board for many of today' s switches are spring-loaded hand down low by the hand of a song becomes a high level. As long as the press release, the module will automatically output a low level. (Switch on the board is high normal) while the input debounce clk is 50Mhz part when you can delay 21ms to determine whether the switch is pressed
Platform: | Size: 1024 | Author: 刘卫菠 | Hits:

[VHDL-FPGA-Verilog] song

Description: 利用verilog演奏梁祝的小程序，关键配置后自动开始演奏，需要硬件的配合。-Butterfly played by verilog small program, the key configuration automatically start playing, you need to match the hardware.
Platform: | Size: 571392 | Author: cy | Hits:

[VHDL-FPGA-Verilog] song

Description: 基于verilog实现的音乐程序，很好听啊-Verilog implementation based on the music program, good to hear ah
Platform: | Size: 556032 | Author: Zhang | Hits:

[VHDL-FPGA-Verilog] song

Description: 用Verilog HDL语言编写的《梁祝》。-Using Verilog HDL language of "Butterfly."
Platform: | Size: 553984 | Author: 孟祥龙 | Hits:

[VHDL-FPGA-Verilog] music_player

Description: 用verilog编写的音乐播放器，内置3首歌-Music player written in Verilog, built-in 3-song
Platform: | Size: 5390336 | Author: 史发更 | Hits:

[Other] song

Description: 自动乐曲仿钢琴的演奏 用Verilog语言是实现-Automatic music imitation piano playing Verilog language
Platform: | Size: 189440 | Author: 于梦磊 | Hits:

[VHDL-FPGA-Verilog] beep

Description: 蜂鸣器播放《友谊地久天长》乐曲，使用Verilog编写-Buzzer play <Auld Lang Syne"> song in Verilog
Platform: | Size: 56320 | Author: duan | Hits:

[VHDL-FPGA-Verilog] main

Description: 采用现场可编程逻辑器件（FPGA）制作，利用EDA软件中的verilog HDL硬件描述语言控制进行控制，然后烧写实现.按键7~1分别用于七个音符的发音（DO，RE，MI，FA，SO，LA，SI），同时LED灯点亮。按键8和9用于控制乐曲的播放，可以选择三个曲子的播放。-Using field-programmable logic device (FPGA) production, the use of EDA software verilog HDL hardware description language control to control, and programming implementation. Buttons 7 to 1, respectively, for the seven notes pronunciation (DO, RE, MI, FA , SO, LA, SI), while LED lights up. 8 and 9 buttons for controlling music playback, you can choose three song playback.
Platform: | Size: 2048 | Author: | Hits:

[VHDL-FPGA-Verilog] buzzer

Description: 基于EP2Q208C8,用Verilog编写的蜂鸣器音乐发生器，蜂鸣器能够根据开关的选择对应地弹奏曲子-Based EP2Q208C8, written using Verilog buzzer music generator, buzzer able to play the song based on the corresponding selection switch
Platform: | Size: 152576 | Author: yangxianfeng | Hits:

[VHDL-FPGA-Verilog] verilog-midi-reader-master

Description: MIDI file parser that converts song and lyric data to Verilog ROM format for use on an FPGA
Platform: | Size: 22528 | Author: 小海豚 | Hits:

[VHDL-FPGA-Verilog] song

Description: 用硬件描述语言verilog hdl写的借助外设蜂鸣器实现产生固定的音乐。-Using Hardware Description Language Verilog HDL written with peripheral buzzer to achieve fixed music.
Platform: | Size: 2048 | Author: hdwahfi | Hits:

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