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[Other] HDL CHIP DESIGN

Description: A practical guide for designing ,synthesizing and simulating ASICs and FPGA using VHDL and verilog hdl
Platform: | Size: 1472502 | Author: zxj0903 | Hits:

[Embeded-SCM Develop] echo_dj

Description: verilog写的回波抵消程序，相当于写了个回波抵消的芯片，不是dsp，可编译后下载于FPGA,绝对原创，写了很长时间。-Verilog echo canceller written procedures, wrote the equivalent of echo canceller chip, not dsp, can be downloaded from the compiled FPGA, absolute originality, writing for a long time.
Platform: | Size: 4096 | Author: 丁谨 | Hits:

[Embeded-SCM Develop] tlc2543

Description: 12位串行A/D转换芯片TLC2543的驱动程序--Driver program for 12-bit serial A/D conversion chip TLC2543.
Platform: | Size: 1024 | Author: 李罗 | Hits:

[VHDL-FPGA-Verilog] uart_verilog

Description: 包含UART口的VERILOG源程序，该程序在FPGA上验证通过，可作为芯片设计，或FPGA设计的一个完整IP核，硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
Platform: | Size: 9216 | Author: 施向东 | Hits:

[VHDL-FPGA-Verilog] ad_da

Description: 芯片ad0809与da0832的实现程序-ad0809 chip with the realization procedures da0832
Platform: | Size: 2048 | Author: 张建 | Hits:

[source in ebook] SystemC片上系统设计源代码

Description: SystemC片上系统设计的源代码： 书籍介绍： SystemC是被实践证明的优秀的系统设计描述语言，它能够完成从系统到门级、从软件到硬件、从设计到验证的全部描述。SystemC 2.01已作为一个稳定的版本提交到IEEE，申请国际标准。 本书为配合清华大学电子工程系SystemC相关课程的教学而编写。全书分9章，内容包括：硬件描述语言的发展史；SystemC出现的历史背景和片上系统设计方法学概述；SystemC的基本语法；SystemC的寄存器传输级设计和SystemC的可综合语言子集，以及根据作者设计经历归结的RTL设计准则和经验；接口、端口和通道等SystemC行为建模实例——片上总线系统；SystemC与VHDL/Verilog HDL的比较；SystemC的验证标准和验证方法学；SystemC开发工具SystemC_win、WaveViewer等，以及使用MATLAB进行SystemC算法模块的验证。每一章都精心编写了课后习题以配合教学的需要。 本书可作为大学电子设计自动化（EDA）相关课程教材，也可供电子工程技术人员作为SystemC设计、应用开发的技术参考书。本书丰富的实例源代码特别适合初学者根据内容实际运行、体会，举一反三，以掌握SystemC进行应用系统设计。 -SystemC system on chip design source : books introduced : SystemC has been proven in practice is an excellent system design description language, it can be completed from the system level to the door, from hardware to software, from design to verification of all description. SystemC has 2.01 as a stable version submitted to the IEEE, the application of international standards. The book to tie in electronic engineering at Tsinghua University SystemC related courses and preparation of teaching. Book nine chapters, including : hardware description language development history; SystemC is the historical background and system-on-chip design methodology outlined; SystemC basic grammar; SystemC register-transfer-level design and synthesis of SystemC language subset, as well as design experience b
Platform: | Size: 2640896 | Author: c.li | Hits:

[USB develop] USB2_chip

Description: USB2.0 chip的一部分verilog源码。opencore上下的，还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Platform: | Size: 35840 | Author: 戴鹏 | Hits:

[VHDL-FPGA-Verilog] verilog_ise_spatan3_clock

Description: verilog 时钟程序实例在ise下编译通过spatan3的芯片-Verilog clock procedures and ideally under the examples compiled by the chip spatan3
Platform: | Size: 458752 | Author: wanglei | Hits:

[ARM-PowerPC-ColdFire-MIPS] AUDIO_DAC

Description: 一个关于声音处理的Verilog语言编写的解码芯片，可以用于FPGA处理芯片的IP核，欢迎大家来用。-a voice on the Verilog language decoder chip, FPGA can be used to handle IP core chips, all are welcome to use.
Platform: | Size: 2048 | Author: 赵春生 | Hits:

[VHDL-FPGA-Verilog] DE2_TV

Description: 一个模拟视频输入转VGA视频输出的Verilog程序，视频解码芯片采用ADV7181B，VGA DAC采用ADV7123，强力推荐-an analog video input to VGA video output Verilog procedures, Video decoder chip used ADV7181B, VGA DAC used ADV7123, strongly recommended!
Platform: | Size: 26624 | Author: 李全 | Hits:

[SCM] 32-bit_RISC_IP_Core

Description: 32位RISC单片机verilog源码内包含说明文档经过他人测试通过-32-bit RISC single-chip Verilog source code contains documentation of others after the test
Platform: | Size: 33792 | Author: 栾日超 | Hits:

[SCM] 8051core-Verilog

Description: VERILOG编写的80C51单片机内核程序-Verilog prepared 80C51 single-chip core procedures
Platform: | Size: 52224 | Author: 陈金冲 | Hits:

[SCM] DW8051(Verilog)

Description: 51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
Platform: | Size: 67584 | Author: xuhuifeng | Hits:

[VHDL-FPGA-Verilog] c54x_verilog

Description: TI 的TMS320C54X的DSP的芯片软核verilog源代码，可以帮助初学者深入了解该系列DSP片内资源核结构，值得参考！-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
Platform: | Size: 22528 | Author: Jackson | Hits:

[VHDL-FPGA-Verilog] Flash

Description: 三星flash编程Verilog程序，单页编程，支持K9K4G08芯片-Samsung' s flash programming Verilog program, single-page programming, support K9K4G08 chip
Platform: | Size: 1024 | Author: 不知道 | Hits:

[Other] verilog

Description: 引入了Verilog HDL 硬件描述语言，向读者展示一种九十年代才真正开始在美国等先进的工业国家逐步推广的 数字逻辑系统的设计方法。借助于这种方法，在电路设计自动化仿真和综合工具的帮助下， 我们完全有能力设计并制造出有自己知识产权的DSP（数字信号处理）类和任何复杂的数 字逻辑集成电路芯片，为我国的电子工业和国防现代化作出应有的贡献。-The introduction of the Verilog HDL hardware description language, to show the reader a kind of nineties really began in the United States and other advanced industrial countries to gradually extend the digital logic system design. With this method, simulation and integrated circuit design automation tools help, we are fully capable to design and create their own intellectual property rights of DSP (digital signal processing) and any complex digital logic integrated circuit chip, for our electronic industry and make due contributions to national defense modernization.
Platform: | Size: 2217984 | Author: da liu | Hits:

[VHDL-FPGA-Verilog] Verilog-SRAM

Description: 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
Platform: | Size: 57344 | Author: yishuihan | Hits:

[VHDL-FPGA-Verilog] chip-SRAM-communication

Description: Verilog编写FPGA与片外SRAM通信模块，内含源代码，希望对大家有所帮助。-FPGA in Verilog-chip SRAM with communication modules, including source code, we want to help.
Platform: | Size: 428032 | Author: haby | Hits:

[VHDL-FPGA-Verilog] DAC-use-verilog

Description: 用verilog写的TLV5620芯片的DAC转换代码，核心文件dac.v，能进行实现，不仅仅是行为级描述-Written with verilog conversion code TLV5620 DAC chip, the core file dac.v, can be achieved, not just behavioral description
Platform: | Size: 302080 | Author: 张生 | Hits:

[Other] SM3算法verilog实现

Description: SM3算法verilog实现,利用alter芯片开发的sm3算法实现(Implementation of SM3 algorithm Verilog and implementation of Sm3 algorithm developed by alter chip)
Platform: | Size: 3072 | Author: rymm | Hits:
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