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[VHDL-FPGA-VerilogViterbiDecodeK9R12HardDecision

Description: viterbi 硬判决译码,基本实现了(2,1,9)卷积码的硬判决译码,用modelsim RTL仿真通过-hard-decision viterbi decoding, the basic realization of the (2,1,9) convolutional codes hard decision decoding, using modelsim RTL simulation through
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