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Description: Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function
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Size: 419604 |
Author: zxinkai |
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Description: 使用 Xilinx 的 FPGA 做的音频信号分析仪,附详细说明及 VHDL 源程序.
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Size: 17190667 |
Author: xyz543 |
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Description: Xilinx FPGA设计进阶(提高篇）-advanced Xilinx FPGA design (Advancement Part 1)
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Size: 2460672 |
Author: 郑忡 |
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Description: Xilinx-FPGA器件管脚说明-Xilinx- FPGA pin description well good
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Size: 6144 |
Author: 黄名 |
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Description: Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function
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Size: 419840 |
Author: zxinkai |
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Description: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
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Size: 1024 |
Author: elisen |
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Description: This paper shows the development of a 1024-point
radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx庐 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis
applications.
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Size: 456704 |
Author: alex |
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Description: 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
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Size: 1287168 |
Author: 徐成发 |
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Description: 对vga接口做了详细的介绍，并且有一
·三段式Verilog的IDE程序，但只有DMA
·电子密码锁，基于fpga实现，密码正
·IIR、FIR、FFT各模块程序设计例程，
·基于逻辑工具的以太网开发，基于逻
·自己写的一个测温元件（ds18b20）的
·光纤通信中的SDH数据帧解析及提取的
·VHDL Programming by Example（McGr
·这是CAN总线控制器的IP核，源码是由
·FPGA设计的SDRAM控制器，有仿真代码
·xilinx fpga 下的IDE控制器原代码,
·用verilog写的，基于查表法实现的LO
·精通verilog HDL语言编- up:in STD_LOGIC
down:in STD_LOGIC
run_stop:in STD_LOGIC
wai_t: in std_logic_vector(2 downto 0)
lift:in std_logic_vector(2 downto 0)
ladd: out std_logic_vector(1 downto 0)
)
end control
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Size: 18683904 |
Author: liuzhou |
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Description: fft implementation in fpga using vhdl xilinx
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Size: 894976 |
Author: prabin |
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Description:
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Size: 209920 |
Author: Nagendran |
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Description: VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
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Size: 20978688 |
Author: 贾斌 |
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Description: fftprocessing can complete 256 pointsFFT.-Hardware Description Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
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Size: 56320 |
Author: zzy |
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Description: fft AND ifft is designed for OFDM application using CORDIC algorithm and implemented in XILINX FPGA.
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Size: 206848 |
Author: pert |
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Description: FPGA 实现高速 FFT 处理器的设计
介绍了采用 Xilinx 公司的 Virtex- II 系列 FPGA 设计高速 FFT 处理器的实现方法及技巧。-FPGA design to achieve high-speed FFT processor implementation methods and techniques in the design of high-speed FFT processor using Xilinx Virtex-II FPGA family.
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Size: 199680 |
Author: 沧海一粟 |
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Description: fpga相关资料，主要关于fft算法方面-Xilinx FPGA about FFT
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Size: 1406976 |
Author: 张三丰 |
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Description: Xilinx FPGA中FFT IP核的使用笔记，内部有FFT硬核的端口说明和具体设置以及源代码，对于数字信号处理研究人员，能图像处理、雷达成像、实时通信开发人员较多的开发时间！-Xilinx FPGA in the FFT IP core using a laptop internal hard core of the FFT port description and specific settings as well as the source code for digital signal processing, image processing, radar imaging, real-time communications developers more development time!
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Size: 1406976 |
Author: 杨光 |
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Description: Abstract—Power is becoming a precious resource in
modern VLSI design, even more so than area. This paper
proposes a novel architecture for modular, scalable &reusable
hybrid constant co-efficient multiplier (KCM) circuit.
Comparison is made between of kcm and multiplier. The
implementation results show a significant improvement in
performance in terms of area, power & timing. In This paper,
we propose to design an 8-point FFT using kcm instead of
complex multiplier and multiplier. Here our goal is to
implement Radix-2 8-point FFT in hardware using hardware
language (verilog) here time constraint is measured with the
help of Xilinx FPGA (Field Programmable Gate Array).
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Size: 560128 |
Author: Bahu |
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Description: 基于FPGA编写的verilog代码，在xilinx上仿真实现FFT变换-FPGA-based verilog code written in xilinx FFT transform Simulation
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Size: 14420992 |
Author: wxl |
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Description: Xilinx公司的FPGA_FFT_应用笔记，详细通俗的讲解了fft算法(Xilinx's FPGA_FFT_ application notes, in detail, explain the FFT algorithm.)
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Size: 1404928 |
Author: 名地方 |
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