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Description: 七段数码显示程序
VHDL
开发环境为Xilinx 的集成开发工具ISE-VHDL digital display program development environment for Xilinx ISE Integrated Development Tools
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Size: 1024 |
Author: imljg |
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Description: 可配置CRC参考设计 xilinx提供的VHDL-configurable CRC reference design for Xilinx VHDL
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Size: 49152 |
Author: 陈旭 |
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Description: ZBT SRAM控制器参考设计,xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
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Size: 9216 |
Author: 陈旭 |
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Description: 曼彻斯特编解码 Xilinx提供的VHDL的源代码-Manchester codec Xilinx provide VHDL source code
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Size: 10240 |
Author: 陈旭 |
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Description: USB接口控制器参考设计,xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
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Size: 460800 |
Author: 陈旭 |
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Description: USB控制器VHDL程(usb_xilinx_vhdl),用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
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Size: 60416 |
Author: 夏社 |
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Description: 在Xilinx环境下编写的vhdl程序,实现推箱子的游戏任务,界面很漂亮。-Xilinx environment in the preparation of the VHDL program, realized the game viewing tasks, the interface is very beautiful.
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Size: 6144 |
Author: 吴倩茜 |
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Description: Xilinx的modelsim 仿真库!里面有许多库函数,对于vlog或vhdl编程有很多好的源代码可以剪切!-Xilinx modelsim simulation library! There are many libraries, vlog or VHDL programming a lot of good source code can shear!
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Size: 32190464 |
Author: 杨俊涛 |
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Description: 在xilinx的ise环境下用vhdl编写的一个时钟程序。-in the environment and ideally with the preparation of a VHDL clock procedures.
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Size: 27648 |
Author: 马永涛 |
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Description: VHDL,verilog串并转换源程序
Xilinx公司参考资料-VHDL, verilog Series and conversion company Xilinx reference source
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Size: 26624 |
Author: 苏翔 |
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Description: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计,并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分,整个自动控制系统由四个模块构成:秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能,其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠,应用于实际当中有较好的实用价值和较高的可行性。-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the possibility.
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Size: 9216 |
Author: 柑佬 |
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Description: 这是我用Xilinx公司的sparten3开发板,ISE集成开发环境,用VHDL语言开发的串口全双工通信程序,供大家参考,共同学习。-This is the company I used the sparten3 Xilinx development boards, ISE Integrated Development Environment, Using VHDL development of the full-duplex serial communication program, for your reference, learning together.
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Size: 657408 |
Author: 汪莉莉 |
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Description: XILINX的DLL的使用介绍,对于时钟的应用有很大的帮助-XILINX the use of the DLL, the application for the clock will be very helpful
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Size: 1009664 |
Author: fei0318 |
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Description: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计,并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分,整个自动控制系统由四个模块构成:秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能,其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠,应用于实际当中有较好的实用价值和较高的可行性-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the feasibility
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Size: 8192 |
Author: 石头 |
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Description: 本程序以XILINX公司的ISE8.2为开发平台,采用VHDL为开发语言,实现了对一个时钟信号分频的功能-the procedures to XILINX ISE8.2 for the development platform VHDL used for the development of language, the right to achieve a clock frequency of the signal function
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Size: 774144 |
Author: 刘小军 |
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Description: [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
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Size: 3687424 |
Author: hawd |
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Description: Xilinx FPGA Design Tutorial
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Size: 1687552 |
Author: kajal |
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Description: xilinx中文培训材料,非常好的FPGA学习资料-xilinx Chinese language training materials, a very good learning materials FPGA
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Size: 3704832 |
Author: 小金 |
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Description: FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others-FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others
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Size: 16619520 |
Author: Aleks |
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Description: VHDL电子琴 报告 华中科技大学xilinx课赛结合-xilinx VHDL electronic organ report
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Size: 2309120 |
Author: 黄钲喆 |
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