Search - ad verilog

[Other resource] ad

Description: fpga ad verilog language
Platform: | Size: 477332 | Author: vi | Hits:

[Program doc] AD转换.doc

Description: Verilog
Platform: | Size: 768000 | Author: v_bestlife@163.com | Hits:

[VHDL-FPGA-Verilog] VLSIrtl_spi

Description: verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.-Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.
Platform: | Size: 46080 | Author: citybus | Hits:

[VHDL-FPGA-Verilog] ADC_16bit

Description: 用verilog硬件描述语言编写的16位数模转换器的源代码，可以综合-with verilog hardware description language of 16 Digital to Analog source code can be integrated
Platform: | Size: 1024 | Author: awp | Hits:

[VHDL-FPGA-Verilog] ad_7266_32_v1_00_a

Description: AD7266的Verilog驱动程序,已仿真通过,可直接在EDK下使用.
Platform: | Size: 394240 | Author: 刘庆强 | Hits:

[SCM] AD_DA

Description: 非常好的,能够实现ad-da转换的子程序-Very good, to realize ad-da conversion subroutine
Platform: | Size: 5189632 | Author: 汪海燕 | Hits:

[Other Embeded program] adder

Description: 基于ALTERA 公司cyclone系列FPGA的程序，verilog 实现加法器-ALTERA company based FPGA family of cyclone procedures, verilog adder realize
Platform: | Size: 209920 | Author: 陶德杰 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 北大微电子学系于敦山老师的课件，介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-Verilog] modulator

Description: 运用FPGA控制AD9957的操作，调试过，运用VERILOG HDL编写-Use FPGA to control the operation of AD9957, debugging, and use the preparation of VERILOG HDL
Platform: | Size: 904192 | Author: px99 | Hits:

[Other Embeded program] ADCcaiyang

Description: 模数转换器AD976采样控制器程序Verilog实现，基于状态机实现-AD976 ADC sampling procedures Verilog realize the controller, based on the state machine to achieve
Platform: | Size: 180224 | Author: cj | Hits:

[VHDL-FPGA-Verilog] tlc5628VHDL

Description: VHDL实现对TLC5628 AD芯片的时序控制,vhdl对时序的控制不仅高速,而且控制时序清晰,容易实现-vhdl counter tlc5628
Platform: | Size: 361472 | Author: 赵惠军 | Hits:

[VHDL-FPGA-Verilog] AD

Description: FPGA控制AD7321的模块，是本人亲自试验过的。有Verilog源码，和简单文档。-FPGA control module of the AD7321 is personally tested. There Verilog source code, and simple document.
Platform: | Size: 1980416 | Author: 柴佳 | Hits:

[VHDL-FPGA-Verilog] ad-ram

Description: ad采样通过fpga 传输给ram-ad fpga ram verilog
Platform: | Size: 2048 | Author: kaikai | Hits:

[VHDL-FPGA-Verilog] DS-Verilog

Description: ad 采集串行ADtlv2543和DATLV5618的接口程序 -ad
Platform: | Size: 3429376 | Author: syrobinss | Hits:

[VHDL-FPGA-Verilog] ad_da_ctr

Description: 基于FPGA的ad和da转换Verilog代码，FPGA采用ep2c5芯片，做成异步fifo，ad芯片采用TI的ths1230,da芯片采用TI的TLV5619，仿真结果基本正确。-FPGA-based ad and da conversion Verilog code, FPGA using ep2c5 chip, made ??of asynchronous fifo, ad-chip using TI s ths1230, da chip uses TI s TLV5619, simulation results are basically correct.
Platform: | Size: 2299904 | Author: ych | Hits:

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

Description: 关于FPGA的提高篇，Verilog HDL语言写的，包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classic procedure
Platform: | Size: 1181696 | Author: chenfeihu | Hits:

[VHDL-FPGA-Verilog] verilogClassicSamples

Description: verilog常用程序及其仿真结果整理，包括LCD，LED，AD采集，URAT，电子琴，电梯控制，自动售货机控制，出租车计价器，电子时钟，频率计，MPSK调制与解调-verilog common finishing process and its simulation results, including LCD, LED, AD collection, URAT, keyboard, elevator control, vending machine control, taxi meter, electronic clock, frequency counter, MPSK modulation and demodulation, etc.
Platform: | Size: 1278976 | Author: ZhangYan | Hits:

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[Other resource] ad

[Program doc] AD转换.doc

[VHDL-FPGA-Verilog] VLSIrtl_spi

[VHDL-FPGA-Verilog] ADC_16bit

[VHDL-FPGA-Verilog] ad_7266_32_v1_00_a

[SCM] AD_DA

[Other Embeded program] adder

[VHDL-FPGA-Verilog] verilog

[VHDL-FPGA-Verilog] modulator

[Other Embeded program] ADCcaiyang

[VHDL-FPGA-Verilog] tlc5628VHDL

[VHDL-FPGA-Verilog] AD

[VHDL-FPGA-Verilog] ad-ram

[VHDL-FPGA-Verilog] DS-Verilog

[VHDL-FPGA-Verilog] ad_da_ctr

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

[VHDL-FPGA-Verilog] verilogClassicSamples

[VHDL-FPGA-Verilog] AD_1

[VHDL-FPGA-Verilog] AD

[Other] AD多通道采集 FFT实验

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