Description: MD5算法的verilog实现,同时包含有testbench。-Verilog of MD5 algorithm is realized, includes testbench at the same time . Platform: |
Size: 4096 |
Author:张雷 |
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Description: AES高级加密算法的verilog语言实现。同时附有AES协议的pdf文档,和此代码的测试程序,可作为一个IP核直接使用,可减少开发人员的设计时间。-AES Advanced Encryption Algorithm Verilog language. While the agreement with AES pdf documents, and that this code of the test procedure can be used as an IP core direct use, developers can reduce design time. Platform: |
Size: 79872 |
Author: |
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Description: 一篇基于小波变换的使用SPIHT算法进行图像压缩的文章-one based on wavelet transform SPIHT the use of image compression algorithm for the article Platform: |
Size: 201728 |
Author:b |
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Description: 拿verilog编写的som(自适应神经网络算法),用于障碍物检测,基于FPGA可综合实验,已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone Platform: |
Size: 5120 |
Author:刘索山 |
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Description: Verilog HDL: Magnitude
For a vector (a,b), the magnitude representation is the following:
A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm.
-Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix Platform: |
Size: 12288 |
Author:郝晋 |
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Description: fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现-fpga-jpeg-verilog FPGA platform used in the Verilog language Algorithm jpeg Platform: |
Size: 104448 |
Author:yang |
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Description: 用cordic算法实现超越函数,sin,cos用此方法也可以实现其他的sinhx,coshx,ex.代码用verilog编写-CORDIC algorithm with transcendental function, sin, cos by this method can also realize other sinhx, coshx, ex. Verilog code used to prepare Platform: |
Size: 236544 |
Author:yu_leo |
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Description: 可用的基于小波的spiht算法,可以自己设定小波分解基数,做成人机交互界面,直观-Available to the SPIHT algorithm based on wavelet, wavelet decomposition can be set for the base, resulting in human-computer interaction interface, intuitive Platform: |
Size: 4057088 |
Author:李雨 |
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Description: DES算法的verilog实现,实现了硬件IC对DES的构架,可以直接应用在系统当中。-DES algorithm Verilog realized, the realization of the hardware IC framework of DES, can be directly used in the system. Platform: |
Size: 10240 |
Author:金鑫 |
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Description: VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful Platform: |
Size: 1024 |
Author:zhaoyizhi |
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Description: 用verilog实现七位最大公约数的算法,使用状态机,可仿真电路图-Seven with the greatest common divisor algorithm verilog implementation, the use of state machine circuit simulation Platform: |
Size: 324608 |
Author:LEEY |
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Description: SM3算法verilog实现,利用alter芯片开发的sm3算法实现(Implementation of SM3 algorithm Verilog and implementation of Sm3 algorithm developed by alter chip) Platform: |
Size: 3072 |
Author:rymm
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