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[matlabfft

Description: This example describes a 32K-point fast Fourier transform (FFT) using the Altera FFT IP MegaCore.
Platform: | Size: 983863 | Author: joey196t@yahoo.com.tw | Hits:

[VHDL-FPGA-Verilog2C35F672_FFT

Description: 在Altera芯片2C35F672平台上的FFT程序,采用DSPBuilder5.0,生成Verilog文件。开发环境:QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
Platform: | Size: 474112 | Author: lovenevol | Hits:

[VHDL-FPGA-Verilogc2h_fft_cyclone_ii

Description: 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed description of altera
Platform: | Size: 723968 | Author: 梁山皮 | Hits:

[Software Engineeringfpgafft

Description: :文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行 分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。 最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。-Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs.
Platform: | Size: 220160 | Author: 王晓 | Hits:

[VHDL-FPGA-Verilogfft_rtl

Description: rtl实现的fft变换,经硬件测试其功能与altera的fftip核相近-fft transform based on rtl design
Platform: | Size: 617472 | Author: 王轶翔 | Hits:

[VHDL-FPGA-VerilogFFTVHDl

Description: 基于FPGA的fft实现 摘要:本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,代替传统DSP芯片或高性能单片机,实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .
Platform: | Size: 32768 | Author: xiang | Hits:

[VHDL-FPGA-VerilogFFT_verilog

Description: verilog实现的FFT变换,经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
Platform: | Size: 618496 | Author: culun | Hits:

[VHDL-FPGA-Verilogaltera_fft

Description: alter官方fft程序 使用verilog编写 需要的同学可以下载-alter the official fft program uses verilog prepared students in need can be downloaded
Platform: | Size: 989184 | Author: 廖国杰 | Hits:

[VHDL-FPGA-VerilogFFT_128_floating_point

Description: 基于Altera FPGA 的FFT128浮点运算模块(veriolg HDL+C51) (开发环境:KeilC51+Quartus7.2)-The module of 128 floating-point FFT based on Altera FPGA(veriolg HDL+C51) (Development environment:KeilC51+Quartus7.2)
Platform: | Size: 8317952 | Author: ch | Hits:

[Otherfftsoft

Description: 应用altera的最新fft核做的使用范例,fft核遵循avalon总线。对于想使用altera的IP core的朋友有帮助-Application of nuclear altera do the latest example of the use fft, fft nuclear follow avalon bus. Who want to use the IP core of friends altera help
Platform: | Size: 4036608 | Author: 样样 | Hits:

[VHDL-FPGA-Verilogfft_32K

Description: This example describes a 32K-point fast Fourier transform using the Altera FFT IP MegaCore. 描述了一个32K的点快速傅立叶变换(FFT) 。
Platform: | Size: 984064 | Author: Joey196t | Hits:

[VHDL-FPGA-VerilogHigh-Speed-FFT

Description: 优秀硕士论文,课题采用现场可编程门阵列((FPGA),设计实现了一种超高速FFT处理器。目前,使用FPGA实现FFT多采用基2和基4结构,随着FPGA规模的不断扩大,使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中,以基2-FFT搭建基16-FFT的运算核,合理安排时序,解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式,使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换,两个内部运算时钟都可以达到1 OOMHz以上,其中256点变换的数据吞吐率高达1.36GHz -a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
Platform: | Size: 3759104 | Author: 陈子牙 | Hits:

[SCMan404

Description: ifft The Altera® FFT MegaCore® function uses block-floating-point (BFP) arithmetic internally to perform calculations. BFP architecture is a trade-off between fixed-point and full floating-point architecture.-ifft The Altera® FFT MegaCore® function uses block-floating-point (BFP) arithmetic internally to perform calculations. BFP architecture is a trade-off between fixed-point and full floating-point architecture.
Platform: | Size: 94208 | Author: hana eldreny | Hits:

[VHDL-FPGA-Verilogfft_ug

Description: altera的FFT IP核的用户手册,介绍了如何使用ALTERA IP核生成FFT核,如何设置参数并讲述了如何仿真,适用于通信方面的FPGA设计工程师,学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FPGA design engineers, students.
Platform: | Size: 1035264 | Author: zhangdong | Hits:

[VHDL-FPGA-VerilogFFF-IP-Core

Description: Altera FFT兆核函数的使用说明,希望对大家有所帮助。-The use of Altera FFT trillion nuclear function, we want to help.
Platform: | Size: 1147904 | Author: lg | Hits:

[MPIfft

Description: altera公司fft ip核的运用。语言是verilog.-Altera company s fft ip. Language verilog.
Platform: | Size: 11977728 | Author: shiyuan | Hits:

[Software EngineeringFFTPVerilog

Description: FFT Verilog RTL 经过测试与Altera FFT IP相当-FFT Verilog RTL Altera FFT IP
Platform: | Size: 8192 | Author: liu | Hits:

[Software EngineeringFFT-based-on-Altera-MegaCore

Description: 本文介绍了一种采用Altera 公司的FFT MegaCore 实现快速傅里叶变换的方法,该方法非常简单,能进一层次简化开发的流程,缩短工程开发周期,节约成本,因此在实际工程中是一种很好的应用。-This paper describes a use of Altera s FFT MegaCore fast Fourier transform method, the method is very simple and can develop into a hierarchy to simplify processes, shorten the project development cycle, cost savings, and therefore is a practical engineering good application.
Platform: | Size: 67584 | Author: 叶宗英 | Hits:

[Embeded LinuxFFT

Description: 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,实现了基于FFT的音频信号分析-Altera Cyclone II FPGA family based embedded high-performance embedded IP core (Nios) soft core processor to achieve a FFT-based audio signal analysis
Platform: | Size: 2048 | Author: 季云 | Hits:

[VHDL-FPGA-VerilogAltera FFT IP核 使用实例

Description: Verilog,关于如何调用Altera官方的FFT iP核,如何输入和得到输出的实例。
Platform: | Size: 9807 | Author: dumn1234 | Hits:
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