Description: 用verilog语言实现的ARM7处理器的标准内核的源代码程序,nnARM, 具有很好的参考价值-using Verilog language of the standard ARM7 processor core source code procedures nnARM, who have a good reference value Platform: |
Size: 457728 |
Author:王晨语 |
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Description: arm7timi架构的verilog代码,可以仿真,通过学习,可以掌握arm7内部架构。-arm7timi verilog structure of the code can be simulated, through learning, be able arm7 internal structure. Platform: |
Size: 677888 |
Author:blueli |
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Description: arm7内核的verilog代码,可以综合,虽有几条指令没有实现,但已实现的功能对理解arm体系结构已足够-ARM7 core Verilog code can be integrated, although some commands do not realize, it has been achieved in understanding the functional architecture has enough arm Platform: |
Size: 681984 |
Author:应建斌 |
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Description: 用verilog编写的ARM7内核代码,通过modelsim仿真-With verilog code written in ARM7 core, through the modelsim simulation Platform: |
Size: 62464 |
Author:guoxiaojin |
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Description: 基于FPGA的ARM IP核!该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open Platform: |
Size: 690176 |
Author:王钊 |
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Description: 5个ram核,arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3
arm6_verilog.rar 一个最简单的arm内核,verilog写的,有点乱
arm7_verilog_1.rar J. Shin用verilog写的arm7核心,结构良好,简明易懂
nnARM01_11_1_3.zip.zip nnARM开源项目,国防科技大学牛人ShengYu Shen写的,原来放在opencores上,因为写得太好了,后被ARM公司封杀~~这里是目前我能找到的最终版本了~
Core_arm_VHDL.rar VHDL语言实现的arm内核,可以在http://www.opencores.org/project,core_arm下载到,不过还不是非常完整,有些小bug
ARM7_VHDL.rar Ruslan Lepetenok用VHDL写的arm内核,也非常不错-5 ram nuclear, arm6_verilog, arm7_verilog_1, arm7_VHDL, Core_arm_VHDL, nnARM01_11_1_3 arm6_verilog.rar arm of a simple kernel, verilog to write, a bit messy arm7_verilog_1.rar J. Shin arm7 use verilog to write the core of well-structured, easily understandable nnARM01_11_1_3 . zip.zip nnARM open source projects, National Defense University cattle ShengYu Shen wrote, the original on the opencores, because so good, and after the ban, ARM ~ ~ Here is the final version I could find out ~ Core_arm_VHDL.rar VHDL language of the arm core, you can http://www.opencores.org/project, core_arm downloaded to, but not very complete, and some small bug ARM7_VHDL.rar Ruslan Lepetenok written in arm with VHDL core, but also very good Platform: |
Size: 1152000 |
Author:YeZiqiang |
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Description: ARM处理器的IP核,用verilog编写的,对处理器和相关的CPU架构知识有很大帮助。-ARM processor IP core, written in verilog processor and CPU architecture knowledge. Platform: |
Size: 74752 |
Author:shen jun |
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Description: ARM Verilog HDL IP CORE, ARM IP核,采用verilog编写-ARM Verilog HDL IP CORE, ARM IP core, using verilog write Platform: |
Size: 48128 |
Author:xuyanwu |
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Description: Developper:mathswork
Arm IP Core Verilog
This IP core is an ARM clone. It has the same architecture of ARM v4. Its main feature lists:
Not support coprocessor instructions
Not support THUMB instruction set
All interrupts supported
-Developper:mathswork
Arm IP Core Verilog
This IP core is an ARM clone. It has the same architecture of ARM v4. Its main feature lists:
Not support coprocessor instructions
Not support THUMB instruction set
All interrupts supported
Platform: |
Size: 36864 |
Author:Master |
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Description: 基于verilog的I2C实现,可以通过软核或者ARM核进行控制哦。(The implementation of I2C based on Verilog can be controlled by soft core or ARM core) Platform: |
Size: 17408 |
Author:shiyangcool
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