Search - asic vhdl

Search - asic vhdl - List

[Other] mp3_decoder DL : 0: mp3的VHDL实现，包括HUFFMAN编码器，量化器，子带滤波器．可用来开发：ＦＰＧＡ，ＡＳＩＣ．-mp3 of VHDL, including HUFFMAN encoder, quantizer, subband filters. Can be used to develop : FPGA, ASIC.
Update : 2025-02-17 Size : 36kb Publisher : 六六
[VHDL-FPGA-Verilog] Sparc_leon_VHDL DL : 0: 一个航天航空用的Sparc处理器（配美国欧洲宇航局用的R_tems嵌入式操作系统）的VHDL源代码，但不能保证版图设计ASIC成功 -the Sparc processor (fitted with the United States of the European Space Agency R_tems Embedded operating system) VHDL source code, but it can not guarantee success ASIC Layout
Update : 2025-02-17 Size : 1.79mb Publisher : 韩红
[VHDL-FPGA-Verilog] VHDL_100Examples DL : 0: 北京里工大学ASIC设计研究所的100个 VHDL程序设计例子-Beijing University Institute of ASIC design hundred examples of VHDL Design
Update : 2025-02-17 Size : 194kb Publisher : 韩红
[Other] taxiwork DL : 0: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性。-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the possibility.
Update : 2025-02-17 Size : 9kb Publisher : 柑佬
[VHDL-FPGA-Verilog] 2006620165231JoY5pZfmvSPHMBQVNp3V DL : 0: vhdl语言例程100个，专用集成电路（ASIC）设计-vhdl language routines 100, application specific integrated circuit (ASIC) design
Update : 2025-02-17 Size : 6.33mb Publisher : sm
[Other] VHDL_example_100 DL : 0: 本书通过100个实例，详细介绍便件描述语言vHDL的各种语法现象及其在专用集成电路(AHc)设计蝴还中的使用方法。-the book through one hundred examples, it detailed description language vHDL pieces of the phenomenon and its various grammatical in ASIC (AHc) were also designed butterfly The usage.
Update : 2025-02-17 Size : 4.94mb Publisher : haopowan
[Other] project_asic.tar DL : 0: MP3解码的ASIC全部过程，含c和vhdl-MP3 decoder ASIC whole process, with c and vhdl
Update : 2025-02-17 Size : 1.2mb Publisher : 丝绒
[VHDL-FPGA-Verilog] mc8051V1.4 DL : 0: 8051硬核源码（VHDL），具有全部VHDL代码、测试环境以及说明文档、综合脚本等完整的开发、验证环境，源代码通过ASIC投片，并得到不断完善-8,051 hard-core source code (VHDL), with all VHDL code, testing and documentation, environment, Comprehensive integrity of the script, such as development, certification, the source code for ASIC through films, and has been continually improved
Update : 2025-02-17 Size : 518kb Publisher : 钟方
[Documents] eb894854-c49f-4ba1-a258-411bc31cf6eb DL : 0: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the feasibility
Update : 2025-02-17 Size : 8kb Publisher : 石头
[VHDL-FPGA-Verilog] Pcit32vhdl DL : 0: PCI 32 target IP for Fpga/asic Designer
Update : 2025-02-17 Size : 418kb Publisher : 李晓媛
[VHDL-FPGA-Verilog] pci_express_crc DL : 0: PCI express CRC rtl core for Fpga/asic Designer
Update : 2025-02-17 Size : 198kb Publisher : 李晓媛
[Streaming Mpeg4] h.264_encoder DL : 0: 本文首先从原理上对264encoder做了详细的说明，并结合asic理论，提出了其设计方案，对于从事asic行业，或者初次接触264的朋友有很好的帮助-In this paper, first of all from the principle of 264encoder to do such a detailed description in combination with asic theory, put forward their designs, for asic industry, or the initial contact 264 has a very good friend to help
Update : 2025-02-17 Size : 372kb Publisher : 裘柏强
[VHDL-FPGA-Verilog] Y312448 DL : 0: 基于VHDL的SDH专用芯片的TOP-DOWN设计，内有全套源码以及图片，内容详尽，绝对真实可靠！-VHDL based on the SDH ASIC Design TOP-DOWN, which has a full set of source code, as well as pictures, and detailed, reliable and absolutely true!
Update : 2025-02-17 Size : 2.49mb Publisher : 殷彦伟
[Program doc] viterbi DL : 0: 维特比译码器的asic设计的相关论文-Viterbi Decoder asic design related articles
Update : 2025-02-17 Size : 271kb Publisher : mediative
[File Format] asic_design DL : 0: 华为,大规模逻辑设计指导书,规格详细，包括：VHDL编写规范，Verilog编写规范，asic设计方法，同步电路设计规则，vhdl电路设计，代码可重用设计，-Huawei, a large-scale logic design guide books, detailed specifications, including: VHDL specification preparation, Verilog specification preparation, asic design, synchronous circuit design rules, vhdl circuit design, reusable code design,
Update : 2025-02-17 Size : 1.95mb Publisher : feng jee
[Other] TFT_LCD_ASIC_implement DL : 0: 彩色TFT液晶显示控制电路设计及其ASIC实现-TFT color LCD control circuit design and ASIC realization
Update : 2025-02-17 Size : 41kb Publisher : 鲁艺
[Other] advanced.asic.synthesis.w.synopsis DL : 0: Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools.-Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools.
Update : 2025-02-17 Size : 2.18mb Publisher : eioruqoiu
[Other] vhdl DL : 0: usb rtl code, to fpga or asic
Update : 2025-02-17 Size : 153kb Publisher : andy
[VHDL-FPGA-Verilog] ASIC_Design_Flow_Tutorial_with_synopsys DL : 0: Tutorial from VCS to IC Compiler for ASIC design using synopsys tool. .
Update : 2025-02-17 Size : 3.94mb Publisher : Kang
[VHDL-FPGA-Verilog] ASIC_VHDL_FPGA_design_lectureNotes DL : 0: 这是美国普渡大学（Purdue University West Lafayette)ASIC design 的课件完整版！带事例和讲解的非常好的VHDL学习材料！含有vhdl 基础知识，设计步骤，UART, RTL,Test Bench 以及测试和调试，DEBUG等各种VHDL设计者必学知识！-This is Purdue University (USA) ECE 337 ASIC design class lecture notes! very classic! The content include basics of vhdl, design process, UART design, RTL design, test and debug etc,etc VERY helpful to VHDL learners. A MUST SEE !
Update : 2025-02-17 Size : 9.85mb Publisher : zhou

« 12 3 4 5 »