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[VHDL-FPGA-Verilog] BP062-BU-01000-r0p0-00rel0[1][1].tar

Description: AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
Platform: | Size: 313344 | Author: 李忠孝 | Hits:

[Windows Develop] System_Design_and_Implementation_of_AXI_Bus

Description: AMBA AXI资料，台湾硕士论文，网上收集-AMBA AXI, Taiwanese master' s thesis, on-line collection of
Platform: | Size: 1288192 | Author: kyle | Hits:

[VHDL-FPGA-Verilog] handshake

Description: AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
Platform: | Size: 196608 | Author: nodeity | Hits:

[VHDL-FPGA-Verilog] axi_master_latest.tar

Description: RobustVerilog generic AXI master stub源码，包括文档说明-RobustVerilog generic AXI master stub
Platform: | Size: 18432 | Author: Archie | Hits:

[VHDL-FPGA-Verilog] verilog-master-files

Description: Verilog master files of AMBA axi interface
Platform: | Size: 26624 | Author: Sasanka | Hits:

[VHDL-FPGA-Verilog] AXI_Master_FSM

Description: AXI Master, is implement with FSM
Platform: | Size: 3072 | Author: iii ggg | Hits:

[Other] axi_master

Description: 自己写的 AXI master code-AXI master code
Platform: | Size: 33792 | Author: redleaf | Hits:

[Software Engineering] rajeev

Description: the above file gives the AXI protocol master and ACE protocol and clock and reset
Platform: | Size: 3460096 | Author: Satya Rajeev | Hits:

[ARM-PowerPC-ColdFire-MIPS] zc706-axi-dma-fifo-master

Description: zc706 axi-dma-fifo-master example
Platform: | Size: 31744 | Author: Yerba | Hits:

[Other] uvm_axi-master

Description: axi uvm vip, verification model -axi system verilog
Platform: | Size: 51200 | Author: 刘红 | Hits:

[Linux-Unix] xilinx_axidma-master

Description: xilinx axi dma driver
Platform: | Size: 83968 | Author: zjlyou | Hits:

[VHDL-FPGA-Verilog] HamamatsuCameralink-master

Description: 实现cameralink，通过xilinx 生怕日天系列实现多路decameralin(Realize cameralink, realize multi-channel decameralin through Xilinx fearful day-to-day series)
Platform: | Size: 25600 | Author: shouyayun | Hits:

[VHDL-FPGA-Verilog] verilog-axi-master

Description: Verilog AXI Components Readme GitHub repository: alexforencich verilog-axi
Platform: | Size: 313344 | Author: viyefo5674 | Hits:

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