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Description: MIPS CPU tested in Icarus Verilog
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Size: 20480 |
Author: imromeo |
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Description: cpu设计实例mips。MIPSI指令集32位CPU （1）MiniCore设计实例全32位操作，32个32位通用寄存器，所有指令和地址全为32位
（2）静态流水线（3～5级）
（3）Forwarding技术
（4）片内L1 Cache，指令、数据各4KByte，硬件初始化
（5）没有TLB，但系统控制协处理器（CP0）具有除页面映射外的全部功能
-cpu design example mips. MIPSI instruction set 32-bit CPU
(1) MiniCore design example of the entire 32-bit operation, 32 32-bit general-purpose registers, all the commands and addresses are all 32-bit (2) static line (3 ~ 5)
(3) Forwarding technology (4 )-chip L1 Cache, command, data of all 4KByte, hardware initialization
(5) there is no TLB, but the system control coprocessor (CP0) with the exception of pages outside the full functionality of mapping
Platform: |
Size: 27648 |
Author: 游笑 |
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Description: Verilog MIPS design.
I found it somewhere on Internet and it is working :-Verilog MIPS design.
I found it somewhere on Internet and it is working :))))
Platform: |
Size: 18432 |
Author: Asparuh Grigorov |
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Description: Incorporates the ARM926EJ-S™ ARM® Thumb® Processor-Incorporates the ARM926EJ-S™ ARM® Thumb® Processor
– DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration
– 8-KByte Data Cache, 8-KByte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICE™ , Debug Communication Channel Support
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Size: 685056 |
Author: 董 |
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Description: mips的nand boot 源碼，是用來設定板子的記體記和cache用的，也會帶起你的bootloader。-for mips Snboot
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Size: 72704 |
Author: 陳信宏 |
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Description: 在maxplus上实现了一个5级流水线的mips cpu，含cache-In maxplus to achieve a 5-stage pipeline of the mips cpu, with cache
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Size: 449536 |
Author: tong tong |
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Description: MIPS体系结构详解,讲解CPU的MMU以及Cache等内容,有助于对CPU入门学习-Detailed MIPS architecture, explain the CPU s MMU and Cache content helps to learn the CPU entry
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Size: 53248 |
Author: 李浩苒 |
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Description: 基于MIPS思维方式，verilog语言，简单的cache 控制器设计，状态机共分4个状态，同时内含多样测试文件-MIPS way of thinking, verilog language, simple cache controller state machine is divided into four states, at the same time contains diverse test file
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Size: 117760 |
Author: 邹楠 |
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Description: 建议CPU五级流水，带有指令寄存器cache，处理数据冒险-code for cpu mips with cache
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Size: 12288 |
Author: liguangye |
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Description: Cache Operations available on all MIPS processors with R4000-style caches.
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Size: 1024 |
Author: wunjaopon |
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Description: Cache Operations available on all MIPS processors with R4000-style caches.
Platform: |
Size: 1024 |
Author: sanjuibs |
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Description: Invalidate the secondary cache before DMA.
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Size: 1024 |
Author: venpbkui |
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Description: 计算机体系结构大作业请思考如何用C语言描述一个计算机系统？
结构：CPU、Cache、主存、基本MIPS指令集
行为：多周期CPU，机器周期如图1.2所示
-Computer architecture project, please think about how to use C language to describe a computer system?
structure: the CPU, Cache, main memory, and basic MIPS instruction set
behavior: more cycles, CPU machine cycle as shown in figure 1.2
Platform: |
Size: 25600 |
Author: 贾巽 |
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Description: 计算机体系结构大作业请思考如何用C语言描述一个计算机系统？
结构：CPU、Cache、主存、基本MIPS指令集
行为：多周期CPU，机器周期如图1.2所示-Computer architecture project, please think about how to use C language to describe a computer system?
structure: the CPU, Cache, main memory, and basic MIPS instruction set
behavior: more cycles, CPU machine cycle as shown in figure 1.2
Platform: |
Size: 18432 |
Author: 贾巽 |
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Description: 计算机体系结构大作业请思考如何用C语言描述一个计算机系统？
结构：CPU、Cache、主存、基本MIPS指令集
行为：多周期CPU，机器周期如图1.2所示-Computer architecture project, please think about how to use C language to describe a computer system?
structure: the CPU, Cache, main memory, and basic MIPS instruction set
behavior: more cycles, CPU machine cycle as shown in figure 1.2
Platform: |
Size: 32768 |
Author: 贾巽 |
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Description: 计算机体系结构大作业请思考如何用C语言描述一个计算机系统？
结构：CPU、Cache、主存、基本MIPS指令集
行为：多周期CPU，机器周期如图1.2所示-Computer architecture project, please think about how to use C language to describe a computer system?
structure: the CPU, Cache, main memory, and basic MIPS instruction set
behavior: more cycles, CPU machine cycle as shown in figure 1.2
Platform: |
Size: 53248 |
Author: 贾巽 |
Hits:
Description: 计算机体系结构大作业请思考如何用C语言描述一个计算机系统？
结构：CPU、Cache、主存、基本MIPS指令集
行为：多周期CPU，机器周期如图1.2所示-Computer architecture project, please think about how to use C language to describe a computer system?
structure: the CPU, Cache, main memory, and basic MIPS instruction set
behavior: more cycles, CPU machine cycle as shown in figure 1.2
Platform: |
Size: 6475776 |
Author: 贾巽 |
Hits: