Search - clock eda

[Other] clock

Description: 本文介绍一种利用 EDA技术和VHDL 语言 ,在MAX+PLUSⅡ环境下,设计了一种新型的智能密码锁。它体积小、功耗低、价格便宜、安全可靠,维护和升级都十分方便,具有较好的应用前景
Platform: | Size: 67885 | Author: 叶仔 | Hits:

[VHDL-FPGA-Verilog] dzzh

Description: eda课程设计:数字钟--vhdl语言全部源代码 -EDA curriculum design: digital clock- vhdl language all source code
Platform: | Size: 1024 | Author: 王伯燕 | Hits:

Description: 数字钟的主要功能有年月日时分秒的显示输出功能和对日期及时间进行设置的功能，还可以有整点报时等功能。设计数字钟的核心问题是时钟日期的自动转换功能。即自动识别不同月份的天数的控制。据此可以设计一个如图所示结构的数字钟，该数字钟包括校时模块、月份天数处理模块、时分秒计时模块、年月日模块和输出选择模块。在本实验中，只进行了简单的数字时分秒设计，其他部分还有待下一步改进。-digital clock is the main function Minutes date when the output function and the date and time set for the function , they can point the entire timekeeping functions. Digital Clock Design is the core issue date of the clock automatic conversion function. Automatic identification is the number of days in the control. One can design a structure as shown in the digital clock, the digital clock module, including schools, the number of days in processing module, Minutes module at the time, date and output modules to choose modules. In this study, only a simple figures accurate design, the other part of the next step yet to be improved.
Platform: | Size: 40960 | Author: wangpeng | Hits:

[Software Engineering] duogongnengzhong

Description: 《多功能数字钟》，绝对好用的EDA程序，已经通过测试-"multifunctional digital clock," absolutely good for EDA procedures, has passed the test
Platform: | Size: 3072 | Author: 潘晓峰 | Hits:

[Software Engineering] EDAproject

Description: EDA课程设计报告，报告是关于数字钟的设计，报告格式正确，讲解详细，是做EDA报告的必备参考。-curriculum design EDA report on the digital clock is the design, report the correct format to explain in detail, EDA is so essential source of the report.
Platform: | Size: 92160 | Author: 潘世雄 | Hits:

[Software Engineering] EDA

Description: EDA数字钟，有设计文档，实验报告，大家交流学习-EDA digital clock, design documents, test reports, to facilitate the exchange of learning
Platform: | Size: 552960 | Author: hzx1959 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 福州大学EDA实验代码,其中包含电子琴,DA转换器,时钟显示器等-Fuzhou University EDA experimental code, which includes electric, DA converters, clock display, etc.
Platform: | Size: 18432 | Author: ARTHUR | Hits:

[Documents] EDA

Description: EDA课程设计实例-----数字电子闹钟的设计-EDA curriculum design examples- the design of digital electronic clock
Platform: | Size: 181248 | Author: Welling | Hits:

[Other] clock

Description: 本文介绍一种利用 EDA技术和VHDL 语言 ,在MAX+PLUSⅡ环境下,设计了一种新型的智能密码锁。它体积小、功耗低、价格便宜、安全可靠,维护和升级都十分方便,具有较好的应用前景-This paper presents a use of EDA technologies and VHDL language, in MAX+ PLUS Ⅱ environment, design a new type of intelligent locks. Its small size, low power consumption, cheap, safe, reliable, maintenance and upgrade are very convenient, has good application prospects
Platform: | Size: 67584 | Author: 叶仔 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。-EDA chapter describes the two technologies integrated application design example: digital alarm clock and direct digital synthesizer DDS.
Platform: | Size: 181248 | Author: 黄鹏曾 | Hits:

[VHDL-FPGA-Verilog] dianzishezhong

Description: 电子时钟 EDA 基本要求： 24小时计数显示；具有校时功能（时，分）附加要求 1、秒表功能（复位，计时-Electronic clock EDA basic requirements: a 24-hour count showed with a school function (hours, minutes,) Additional requirement 1, stopwatch functions (reset, clock
Platform: | Size: 3072 | Author: Jaman | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL
Platform: | Size: 17139712 | Author: 周蕾 | Hits:

[assembly language] clock

Description: EDA 数字钟实现文件能够实现计时,闹钟,校时功能 -EDA digital clock time to achieve the realization of paper, alarm clock, school functions
Platform: | Size: 180224 | Author: yuryan | Hits:

[Software Engineering] eda

Description: eda课程设计报告电子时钟整点报时调整时间-curriculum design EDA report the whole point of electronic time clock adjust time
Platform: | Size: 150528 | Author: 需索 | Hits:

[Other] EDA

Description: 以前学EDA的时候做过的四个小程序，分别是24/12小时制数字钟、数字频率计、乐曲播放电路、多人智力竞赛抢答器-EDA previously done when the four small procedures are 24/12 hour digital clock, digital frequency meter, circuit music players and many more devices quiz Answer
Platform: | Size: 461824 | Author: 王宇 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: EDA数字电子钟课程设计。时钟自动计时，并且将计时数据传送至显示管显示。-EDA digital electronic clock curriculum design. Clock automatic timing, and timing data will be sent to the display tube display.
Platform: | Size: 5120 | Author: xiaokun | Hits:

[Other] eda

Description: eda实验时钟电路系统由秒时钟产生电路、走时电路模块、数字显示模块、校时模块、语音报时模块、工业控制模块-eda test clock circuit generated by the second clock circuit, the circuit blocks away, the digital display module, the campus module, voice timekeeping module, industrial control modules
Platform: | Size: 2639872 | Author: 樱花烬 | Hits:

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[Other] clock

[VHDL-FPGA-Verilog] dzzh

[VHDL-FPGA-Verilog] edaTimer

[Software Engineering] duogongnengzhong

[Software Engineering] EDAproject

[Software Engineering] EDA

[VHDL-FPGA-Verilog] EDA

[Documents] EDA

[Other] clock

[VHDL-FPGA-Verilog] EDA

[VHDL-FPGA-Verilog] dianzishezhong

[VHDL-FPGA-Verilog] EDA

[assembly language] clock

[Software Engineering] eda

[Other] EDA

[VHDL-FPGA-Verilog] EDA

[Other] eda

[Compress-Decompress algrithms] clock

[VHDL-FPGA-Verilog] clock

[VHDL-FPGA-Verilog] eda

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