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[Game Programgpegsol-0.3

Description: JavaScript 计数器的游戏。要运行这个游戏,点击左边的按钮,计数器将开始。再点击一次这个按钮,将停止计数器。 -JavaScript counter game. To run the game, click the left button, counters will begin. Another click a button to stop counter.
Platform: | Size: 245913 | Author: 张光强 | Hits:

[OtherSxShop31

Description: 数据库设计2.页面的设计与开发3.小结第8章在线考试系统 161 实例分析 161 1. 系统设计2.系统功能预览知识要点 167 制作步骤 168 1 ... 利用简单的HTML代码与脚本 融合而成的ASP技术可以开发强大的Web应用程序,例如数据库的存取、文件的访问、计数器的 -2 database design. Page Design and Development 3. Summary Chapter 8 Online Examination System 161 Case Analysis 161 1. System Design 2. System functions preview knowledge produced 167 points 168 1 ... steps using simple HTML and script code combining ASP technology can be a powerful development of Web applications, such as database access, file access, counters
Platform: | Size: 7893986 | Author: 甘永祥 | Hits:

[WinSock-NDIS0307cfcount

Description:  功 能: 1.40种记数器图片样式可以选择,并且可以方便自由地增加记数器图片样式! 2.可以设置计数器显示数字,计数器起始时间,计数器隐藏,是否防刷新记数。 3.可以记录来访客的来源IP地址和来源页面信息。 4.每天的访问数据统计。 6.密码找回功能。 7.为多用户计数器,具有注册用户管理功能,可以设置记数器运行环境。 8.可以设置记录的最大条数,超过会自动删除,保证系统快速稳定运行。 9.增加计数器图片样式的方法:把新的计数器图片复制到counterpic目录,然后设置样式数量即可。 v3.2,新加入功能:在线人数统计,图片位数设置 默认超级管理员登陆页面:admin.asp 用户名为:admin 密码:admin-function : 1.40 species Register Photo format can choose, as well as to increase the convenience and freedom Register Photo style! 2. The setting up of counter revealed, counters starting time, counter hidden, mind-set number. 3. Visitors can record to the source IP address and source of information pages. 4. Daily visit data. 6. Password regain function. 7. For multi-user counters, with a registered user management functions can be set Register runtime environment. 8. The setting up of the largest record number of over will be automatically deleted, ensuring rapid and stable system operation. 9. Photo increase counter style approach : a new copy of the photo counter counterpic catalog, then set up the style number can be. V3.2, the new functions : the number of online statistics, the medi
Platform: | Size: 314146 | Author: 何力 | Hits:

[Other resourcever2.0

Description: 采用CYGNAL F015单片机,用于一个电池老化试验柜(即循环充放电)的实用程序,实现了SMBUS总线通信协议。-used CYGNAL macroeconomic microcontroller, for a battery aging test counters (that is, charge-discharge cycle), the practical procedures to achieve the SMBUS bus communication protocols.
Platform: | Size: 113106 | Author: 管红超 | Hits:

[assembly language8253 8259 time

Description: 计时程序,对8253进行分频,使用二个计数器,使第二个计数器的OUT作为中断源,送到8259产生中断,在LED上显示时间-time procedures for the 8,253-frequency, the use of two counters, so that a second counter OUT interrupted as a source to have interrupted 8259, the time shown on the LED
Platform: | Size: 871 | Author: 钟华 | Hits:

[Other resourcecounter10

Description: 该程序实现的是10进制的计数器,具有置位复位的功能。-the program is the band of 10 counters, with the home-reset function.
Platform: | Size: 13298 | Author: 许嘉璐 | Hits:

[OtherCounters

Description: Multiple counters, demo how to dynamic create multiple counters, and count by itself. -Multiple counters, demo how to create dynamic multiple counters, and count by itself.
Platform: | Size: 914499 | Author: Gemi | Hits:

[VHDL-FPGA-Verilogvhdl程序例子

Description: vhdl程序源代码,包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

[OtherCounters

Description: Multiple counters, demo how to dynamic create multiple counters, and count by itself. -Multiple counters, demo how to create dynamic multiple counters, and count by itself.
Platform: | Size: 914432 | Author: Gemi | Hits:

[VHDL-FPGA-VerilogVerilog_example

Description: 本文件包括多路选择器器建模,译码器实验程序,加法器实验程序,比较器实验程序,计数器建模,I2C接口标准建模源码,串行接口RS232标准建模源码标准,LCM建模源码,时钟6分频源码,串并转化源码。 ,对于硬件设计初学者来说有一定的参考价值。-This document includes MUX device modeling, experimental procedure decoder, adder experimental procedures, experimental procedures comparators, counters modeling, I2C interface standard modeling source, standard RS232 serial interface modeling source standards, LCM modeling source, clock frequency source 6, and transforming source string. For hardware design beginners have a certain reference value.
Platform: | Size: 1064960 | Author: 朱秋玲 | Hits:

[WEB Codecount

Description: Asp网站访问量计数器,简单实用,有不同的数字图片可选择!-Asp site traffic counters, simple and practical, there are different digital picture to choose!
Platform: | Size: 95232 | Author: jackji | Hits:

[Othercounters

Description: 两数相加,主要是对输入的判断那花了点篇幅 不过是绝对正确的 我都运行了 -counters
Platform: | Size: 2048 | Author: 胡家馨 | Hits:

[VHDL-FPGA-Verilogvhdlcoder

Description: 本文件夹包含了16个VHDL 编程实例,仅供读者编程时学习参考。 一、四位可预置75MHz -BCD码(加/减)计数显示器(ADD-SUB)。 二、指示灯循环显示器(LED-CIRCLE) 三、七人表决器vote7 四、格雷码变换器graytobin 五、1位BCD码加法器bcdadder 六、四位全加器adder4 七、英语字母显示电路 alpher 八、74LS160计数器74ls160 九、可变步长加减计数器 multicount 十、可控脉冲发生器pluse 十一、正负脉宽数控调制信号发生器pluse width 十二、序列检测器string 十三、出租车计费器spend 十四、数字秒表selclk 十五、抢答器 first -This folder contains 16 examples of VHDL programming, only for readers to learn programming reference. 1, 4 Preset 75MHz-BCD code (plus/minus) count display (ADD-SUB). Second, light cycle display (LED-CIRCLE) 3, seven voting machines vote7 4, Gray code converter graytobin 5, a BCD code adder bcdadder six, four full adder adder4 seven or eight English letter display circuit alpher , 74LS160 counter 74ls160 9, variable-step addition and subtraction counters multicount 10, controllable pulse generator pluse 11, positive and negative pulse width modulation signal generator pluse width of NC 12, sequence detector string 13, a taxi billing spend 14 devices, digital stopwatch selclk 15, Responder first
Platform: | Size: 59392 | Author: 李磊 | Hits:

[Embeded-SCM DevelopSPI-interface-counters

Description: SPI接口的计数器。对于初学者是非常好的学习资料-SPI interface counters. For beginners is very good learning materials
Platform: | Size: 132096 | Author: | Hits:

[Industry researchUsage-of-performance-counters-in-miniMIPS-for-Fun

Description: The quality of functional testing of supercomputer application often requires analyzing the interaction of the appli- cation and the underlying architecture. In this report, we incorpo- rate some performance counters in the minMIPS which monitor a variety of processor events such as pipeline stalls,branch predictions and memory access. We fi rst explain how proposed method implemented.We then describe how the performance counters can increase the test coverage for functional testing of the microprocessor.And fi nally we reported the result of both tests results with and with out performance counter.
Platform: | Size: 160768 | Author: sudu | Hits:

[VHDL-FPGA-VerilogBuilding-Counters-Veriog-Example

Description: building counters in vhdl
Platform: | Size: 15360 | Author: santosh | Hits:

[Software EngineeringRESET-COUNTERS

Description: use as practice to work ona micrologix 1000, to reset counters
Platform: | Size: 9216 | Author: Rice | Hits:

[VHDL-FPGA-Verilogcounters

Description: DIFFERNT TYPES OF COUNTERS
Platform: | Size: 3072 | Author: guruprasad sp | Hits:

[Embeded Linuxcounters

Description: 两数相加,主要是对输入的判断那花了点篇幅 不过是绝对正确的 我都运行了 -counters
Platform: | Size: 2048 | Author: cz2500 | Hits:

[VHDL-FPGA-Verilogbasic verilog codes

Description: Basic Verilog code includes RING and Johnson counters, Up-down counters, RAM, ROM, SIPO, PISO, SISO, PIPO, Mealy and Moore FSM codes
Platform: | Size: 9386 | Author: spgp1306 | Hits:
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