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Description: VHDL语言实现的CRC校验,函数形式,包括CRC4,CRC8,CRC16和CRC32
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Size: 2040 |
Author: 李浩 |
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Description: 此是进行循环冗余效验的Verilog编码,适合多种标准,如CRC16-this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY
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Size: 3072 |
Author: 藏瑞 |
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Description: VHDL语言实现的CRC校验,函数形式,包括CRC4,CRC8,CRC16和CRC32-VHDL language to achieve the CRC checksum, function forms, including CRC4, CRC8, CRC16 and CRC32
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Size: 2048 |
Author: 李浩 |
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Description: 此源代码实现了CRC5和CRC16的校验以及校验码的产生,可以直接用于RFID标签数字电路。-This source code CRC5 and realize the CRC16 checksum and the emergence of parity-check codes, RFID tags can be directly used for digital circuits.
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Size: 2048 |
Author: 朱秋玲 |
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Description: 16位的CRC校验函数包。符合ccitt标准,查表法校验,速度快。节省CPU时间。值得一看!-16 The CRC checksum function package. Consistent with the CCITT standards, look-up table method validation, fast. Save CPU time. Worth a visit!
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Size: 1024 |
Author: cumt |
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Description: 16bit CRC for 8bits data
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Size: 1024 |
Author: 苗淼 |
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Description: crc16 module for SDIO DAT line calculation
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Size: 1024 |
Author: kantengri |
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Description: crc16的串行和并行写法,而且有详细的测试文件-Serial and parallel crc16 written, and detailed test documents
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Size: 20480 |
Author: Jammy |
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Description: sub opercore USB CRC5 and CRC16 Modules ////
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//// Author: Rudolf Usselmann ////
//// rudi@asics.ws ////
//// ////
//// ////
//// Downloaded from: http://www.opencores.org/cores/usb/-sub opercore USB CRC5 and CRC16 Modules//////////////////////// Author: Rudolf Usselmann//////// rudi@asics.ws//////////////////////// Downloaded from: http://www.opencores.org/cores/usb/
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Size: 196608 |
Author: hajc |
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Description: crc16,数据位宽为8,verilog编码-crc16 ,datawidth is 8,coding by verilog
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Size: 1024 |
Author: chenk |
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Description: -- crc.vhd
-- Used for calculation of CRC16-CCITT
-- Intended use is as custom peripheral for Nios processor
-- When address is logic 0 =>
-- Internal CRC register is initialised with write_data value
-- When address is logic 1 =>
-- CRC calulation is updated based on input word on write_data
-- CRC result is obtained by reading any address
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Size: 1024 |
Author: Jan Petak |
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Description: CRC16 VHDL component
implements sequential algorithm for incoming data CRC16 calculation
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Size: 3072 |
Author: Dmitry |
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Description: 包含16位CRC的并行实现和串行实现,并有测试程序。-Includes 16-bit CRC of the parallel and serial implementation to achieve, and test procedures.
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Size: 3072 |
Author: 程显雯 |
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Description: 16位的CRC校验 使用VHDL实现 有几个模块 主模块 接收模块 测试模块-16-bit CRC checksum VHDL implementation
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Size: 301056 |
Author: 李晓倩 |
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Description: 一个实现CRC16的VHDL代码,以及说明CRC计算的原理和方法。(a VHDL code for CRC16.)
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Size: 7168 |
Author: camelcc
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