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Description: 显示器ddc数据通道的时钟和数据信号检测的Verilog代码。
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Size: 874 |
Author: yangguotao |
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Description: ddc simulation 进行DDC实现过程的仿真-ddc simulation DDC realization process for the simulation
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Size: 1024 |
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Description: GC4016 DDC Chip GC4016
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Size: 211968 |
Author: 张晋 |
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Description: 介绍了一种基于软件无线电思想的频分多址中频数字化接收机系统设计方案。它采用Altera公司的FPGA构成核
心单元,通过不同的软件配置实现对三路频分多址信号的解调。
-Introduce a software-based radio thinking FDMA digital IF receiver system design. It uses Altera s FPGA constitute the core unit, through different software configuration for the three-way realize FDMA signal demodulation.
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Size: 816128 |
Author: 可难 |
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Description: DDC design based on AD6634,useful-DDC design based on AD6634, useful
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Size: 39936 |
Author: 岳翔 |
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Description: 个DDC使用的级联滤波器,结构CIC6+CFIR+PFIR-DDC using a cascade filter, the structure of CIC6+ CFIR+ PFIR
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Size: 2048 |
Author: yeong |
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Description: 用6阶CIC实现,加噪声仿真。序内加详尽注释。-6 bands CIC realized, plus noise simulation. Sequence with a detailed note.
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Size: 2048 |
Author: yeong |
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Description: matlab与synplify DSP AE相结合的DDC实例,希望对大家有所帮助-matlab and synplify DSP AE combining DDC example, in the hope that U.S. help
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Size: 187392 |
Author: luocaijin |
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Description: CIC filter setup, this is special used for the DDC
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Size: 7168 |
Author: 朱天翔 |
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Description: verilog语言实现的数字下变频设计。
在ALTERA的QUARTUS ii下实现。实用,好用。-Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
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Size: 44032 |
Author: 咚咚 |
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Description: simulink demo of ddc
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Size: 173056 |
Author: bnpvas |
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Description: 随着数模转换器硬件的快速发展和DSP处理能力及处理速度的逐步提高,软件无线电技术在商用和军用无线电通信领域也越来越显示出其强大的吸引力。本文研究的高速中频采样和数字下变频技术是目前蓬勃发展的软件无线电领域的两项关键技术。-As advances in technology provide increasingly faster and less expensive digital hardware, more of the traditionally analog functions of a radio receiver will be replaced with software or digital hardware. The software radio has show its fascinating functions in both commercial and military wireless communication. The high speed and high resolution analog-to-digital converter and digital down-converter which are researched in this thesis are two of the key technologies in the field of software radio that is vigorously developing recently.
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Size: 2652160 |
Author: zc |
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Description: Digital Down Covertor Documents
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Size: 1491968 |
Author: Kiran |
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Description: 介绍在FPGA 器件上如何实现单通道数字下变频(DDC)系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the preparation of some call a combination of IP core method of the FPGA digital down conversion method, and completed its main modules of simulation and debugging, and initial system-level verification.
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Size: 162816 |
Author: 于银 |
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Description: DDC仿真模型,利用systemgenerator实现数字下变频-DDC simulation model, the use of digital down-conversion systemgenerator
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Size: 16384 |
Author: 曾重阳 |
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Description: 仿真了DDC的工作流程,不了解数字下变频的朋友可以下载-DDC emulation of the workflow, do not understand the digital down-conversion can be downloaded to see if a friend
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Size: 1024 |
Author: 郑程 |
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Description: 自己编写的数字接收机程序,多相信道化接收机MATLAB程序,DDC程序-An DDC program by myself
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Size: 3072 |
Author: dengzi1358 |
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Description: 电子科大2009-应用于无线电监测的高速信号处理平台设计,软件无线电的DDC的FPGA实现!-UESTC 2009- applies to wireless monitoring of high-speed signal processing platform design, software radio DDC' s FPGA implementation!
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Size: 4819968 |
Author: peter |
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Description: 宽带DDC的Verilog程序,及其MATLAB仿真程序看结果,最大可达100M带宽,程序中用的是50M-Wideband DDC' s Verilog program, and MATLAB simulation program to see the results, the maximum bandwidth of up to 100M, the program used is 50M
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Size: 8477696 |
Author: 左洪成 |
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Description: 本文对下变频模块中抽取滤波进行了详细的分析,并详细阐述了其FPGA的实现过程和方法(In this paper, the decimation filtering in the down conversion module is analyzed in detail, and the realization process and method of FPGA are discussed in detail)
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Size: 472064 |
Author: davidbmd
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