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[Booksdds

Description: 直接数字频率合成器dds资料-Direct Digital Frequency Synthesizer dds information
Platform: | Size: 911360 | Author: 易小弟 | Hits:

[Software Engineeringdds

Description: 基于FPGA的双路可移相任意波形发生器 Altera中国大学生电子设计文章竞赛获奖作品刊登-FPGA-based dual phase shifter can be arbitrary waveform generator Altera China Undergraduate Electronic Design Contest winning entries published articles
Platform: | Size: 1695744 | Author: 姜兆刚 | Hits:

[SCMsgs32

Description: Verlog HDL 写得一款32路方波发生器,例子是4路可以自己加,相位可调,频率可调,占空比可调。具体参见readme.doc.此处只提供了源码包含顶层模块sgs32.v 子模块dds.v和pll设置模块altp.v及波形驱动文件-Verlog HDL write a 32 square-wave generator, for example, is able to add 4-way, phase adjustable, adjustable frequency, adjustable duty cycle. See readme.doc. Here only provide a source module that contains the top-level sub-modules sgs32.v settings dds.v and pll module altp.v and waveform-driven document
Platform: | Size: 59392 | Author: TTHR | Hits:

[SCMdfefe.doc

Description: 该高频正弦信号发生器基于直接数字频率合成(DDS)和数字锁相环技术(DPLL),以微控制器(MCU)和现场可编程逻辑门阵列(FPGA)为核心,辅以必要的外围电路设计而成。系统主要由正弦信号发生、红外遥控、高速模数(A/D)-数模(D/A)转换、信号调制和后级处理等模块组成。-The high-frequency sinusoidal signal generator based on Direct Digital Synthesis (DDS) and digital PLL (DPLL), a microcontroller (MCU) and field programmable gate array (FPGA) as the core, supplemented by the necessary peripheral from circuit design. System is composed of sinusoidal signal, infrared remote control, high-speed module (A/D)- digital-analog (D/A) conversion, signal modulation and post-level processing modules.
Platform: | Size: 243712 | Author: henry | Hits:

[DSP programdds

Description: dsp digital synthesis - doc 1/3 This document describes/learn you the technical details of digital signal processing. It is usefull for creating wavetable synthesizer projects
Platform: | Size: 804864 | Author: wimpie | Hits:

[VHDL-FPGA-VerilogDDS-STC89C52-DAC0800-FPGA.doc

Description: 电子设计大赛,波形发生器,基于单片机和FPGA的DDS信号源。-Electronic Design Contest, waveform generator, microcontroller and FPGA-based DDS signal source.
Platform: | Size: 1718272 | Author: 刘尚霖 | Hits:

[VHDL-FPGA-Verilogwaveform_gen_latest.tar

Description: This file consists of a design with doc file description to generate sin-cos, sawtooth and square waves. The method used is DDS.
Platform: | Size: 570368 | Author: mostafa | Hits:

[SCMDDS-AD9854sourcecode

Description: ad9854波形程序集_可编辑,.doc格式,豆丁付费文件哦,欢迎下载-ad9854 waveform assemblies _ editable,. doc format files Douding pay Oh, welcome to download
Platform: | Size: 30720 | Author: 张三金 | Hits:

[matlabread_SRTMtile

Description: 读取高程数据的MATLAB程序,经过测试,很不错的,希望对大家有帮助- read_SRTMtile: returns lon, lat, & height (height in meters) SRTM 3-arcsec data USE: [vlon vlat vhgt] read_SRTMtile(filename,sc) INPUT: filename: filename, e.g. s23w041.hgt sc: spot check, any value here will produce a low resolution image of tile (note: image rendering can be time consuming) OUTPUT: vlon: cell longitude vlat: cell latitude vhgt: cell height (in meters) NOTES: + SRTM 3-arc sec data can be downloaded from: http://dds.cr.usgs.gov/srtm/version2_1/SRTM3/ (as per http://www2.jpl.nasa.gov/srtm/) + filename is parsed to obtain lower left (LL) coordinates of tile (as per quickstart.pdf doc in: http://dds.cr.usgs.gov/srtm/version2_1/Documentation/ File names refer to the latitude and longitude of the lower
Platform: | Size: 2048 | Author: zzg | Hits:

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