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Description: 【摘要】本文介鲴了一种高性能DDS芯片一AD9852应用的研究结果。谊合成嚣的DDS芯片选用AD公司最新推出的AD9852．其宽带杂散优于60dBe，频率捷变时间小于200ns。本文在讨论AD9852组成与功能的基础上，对其在攮率综合、波形合成扣踮颧通信系统中的应用进行了研究。
关键词：直接数字合成；杂散；混频；疏颧
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Size: 134111 |
Author: 梅名 |
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Description: The basic parts of the BFSK transmitter are the preamble and the data input circuit. The preamble sequence is positioned in front of each packet of 122 bits for a total of 128 bits packet. The main purpose of the preamble is to facilitate the reception, providing both bit and packet synchronization. The data input circuit mainly consists from memory elements and a convolutional encoder with r=1/2. Thus, the input bits must be stored in a temporary memory and be partitioned in blocks of 61 bits. Then the convolutional encoder doubles the bits and adds two more trail bits at the end of the message. A multiplexer makes sure that that the correct sequence, choosing between preamble and encoded bit, is propagating to the next stage. The next stage of the transmitter consists of two direct digital synthesizers (DDS), and a multiplexer that is fed with zeros and ones to choose between the two frequencies. For each bit, we allow 64 samples of the respective frequency to be transmitted. Although the implementation of the selection between the two frequencies is strait forward, the enable port of the multiplexer should be used along with a Matlab Code (MCode) block in order to prevent the propagation of some initial undefined states during initialization. The only functionality of the MCode block is to enable the multiplexer after the first bit of the preamble is detected. Finally, pulse shaping is not used and the addition of a single filter after the last multiplexer would suffice to implement this functionality.
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Size: 31381 |
Author: publicxz |
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Description: 这是关于门禁控制器的一个很好的说明，用的是DDS，大家可以参考看看。-Access Controller on a good note, using the DDS, we can look at the reference.
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Size: 984064 |
Author: dkp |
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Description: sin数据生成，可以生成DDS的ROM文件-sin data generation, the generation DDS ROM documents
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Size: 187392 |
Author: lxq |
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Description: 【摘要】本文介鲴了一种高性能DDS芯片一AD9852应用的研究结果。谊合成嚣的DDS芯片选用AD公司最新推出的AD9852．其宽带杂散优于60dBe，频率捷变时间小于200ns。本文在讨论AD9852组成与功能的基础上，对其在攮率综合、波形合成扣踮颧通信系统中的应用进行了研究。
关键词：直接数字合成；杂散；混频；疏颧
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Size: 134144 |
Author: 梅名 |
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Description: FPGA 和ＭＣＵ的并口通信 及ＭＣＵ和Ｅ２ＰＲＯＭ(FM25H20)SPI通信
功能：ＦＰＧＡ对ＭＣＵ的写（ＦＰＧＡ发给ＭＣＵ的地址是写进Ｅ２ＰＲＯＭ的地址 ，Ｅ２ＰＲＯＭ中的数据是 ＦＰＧＡ发送的数据。）
ＦＰＧＡ对ＭＣＵ的读（ＦＰＧＡ读取它发给ＭＣＵ在Ｅ２ＰＲＯＭ中存取的数据）
程序和图见附件 恳请高手指导 小弟急啊！-FPGA and MCU
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Size: 34816 |
Author: 爱迪生法 |
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Description: 针对MT9M111数字图像传感器,采用Cyclone系列 EP1C6Q240C6作为主控芯片,设计并实现了ITU-R BT.656视频数据的采集、色彩空间转换、DVI-I显示控制的数字视频转换系统。系统可以将传感器的输入图像以1280×960(60Hz)和 1280×1024(60Hz)格式输出到DVI-I显示器上,并具有图像静止功能,同时在系统空闲时,可以将系统设置为待机状态,来降低功耗。-Aimed at the digital image sensor MT9M111,used Cyclone EP1C6Q240C6 as the main control chip,designed and implemented the conversion system of the collection of the ITU-R BT.656 video data,color space conversion,and the display on DVI-I monitor.This system can display the image from the sensor on DVI-I monitor in the mode of 1280960(60 Hz)or 12801024(60 Hz),image freezing is also supported.Moreover,the system can be set into standby state when the system is idled,for low power consumption.
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Size: 563200 |
Author: 将建 |
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Description: 自己编的，用FPGA实现软件DDS调幅。编程语言是VHDL。拿出来相互学习一下。-Own, and with FPGA AM DDS software. Programming language is VHDL. Look out to learn from each other.
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Size: 271360 |
Author: lixuedeng |
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Description: 这是一个任意频率的正弦信号发生器，具有可改变输出信号频率，输出信号相位，任意转换输出信号类型（正弦、余弦、锯齿波、方波），屏幕可分别显示用户设定的信号频率与输出信号检测频率。-This is an arbitrary frequency sinusoidal signal generator, with can change the output signal frequency, the output signal phase, arbitrary conversion output signal types (sine, cosine, sawtooth, square wave), the screen showed the user can set the signal frequency and Output signal detection frequency.
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Size: 1987584 |
Author: 紫郢寒光 |
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Description: 在BFSK发射机的基本部分是序言和数据输入电路。序言序列定位在每122位的数据包前一共有128位的数据包。序言的主要目的是协助接待，同时提供同步和数据包位。
数据输入电路主要由来自存储元件和卷积编码器与R = 1 / 2。因此，输入位必须被储存在一个临时内存，并在61位的存储区块分区。然后，卷积编码器，并增加了一倍位在邮件的末尾2位更多线索。阿多路可确保正确的序列，编码的比特之间的序言和选择，是传播到下一个阶段。
在下一阶段的发射器由两个直接器（DDS）数字合成器，以及一个用0和1之间作出选择，美联储的两个频率复用。对于每一个位，我们让64频率分别送交样本。虽然两者之间的频率选择执行两岸未来，使本应使用端口复用器随着Matlab代码（MCode）块，以防止在初始化的一些初步不确定状态的传播。该MCode块唯一功能是使序言后，第一位复用器检测。
最后，脉冲成形不使用，在最后复用器单一过滤除就足以实现此功能。
接收器可通过电子邮件（kvoskaki@nps.edu），是不是100％的功能。有些意见是需要的任何人都可以帮忙。 -transmitter_model_final.mdl
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Size: 27648 |
Author: 222 |
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Description: 使用dds芯片ad9850制作信号源是我在大三做过的一个小创新实验，这是当时的源程序，已通过测试。-dds_ad9850_signal_generator
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Size: 5120 |
Author: blite |
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Description: 采用FPGA来实现DDS，发出任意频率的三角波，方波或正弦波-Use FPGA to implement DDS, given any frequency triangle wave, square wave or sine wave
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Size: 416768 |
Author: haha |
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Description: 基于DDS技术的多普勒信号模拟器设计Doppler signal based on DDS technology Simulator-Doppler signal based on DDS technology Simulator
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Size: 384000 |
Author: bala1234 |
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Description: aTmega16做的简易信号发生器，能够产生正弦波、方波、三角波、锯齿波、反向锯齿波、心电图、噪声，频率范围 0 ~ 65534Hz，还有一个高速输出口能输出1, 2, 4 ,8MHz信号 振幅0-10V，直流偏置范围-5V~5V，频率步进1, 10, 100, 1000, 10000Hz，能够保存设置。
电路由AVR最小系统、R-2R电阻网络组成的DAC电路、LM358放大电路、按键、LCD显示构成。
熔丝：HIGH = 0×59
LOW = 0xCF-aTmega16 do a simple signal generator can produce sine, square, triangle wave, sawtooth, reverse sawtooth, ECG, noise, frequency range 0 ~ 65534Hz, there is a high-speed output port can output 1, 2, 4, 8MHz signal amplitude 0-10V, DC bias range-5V ~ 5V, frequency step 1, 10, 100, 1000, 10000Hz, be able to save the settings. The minimum system circuit AVR, R-2R resistor network consisting of the DAC circuit, LM358 amplifier, key, LCD display composition. Fuse: HIGH = 059 LOW = 0xCF
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Size: 128000 |
Author: 刘建华 |
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