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Description: 本代码是控制DS1302的VHDL代码,浅显易懂,方便修改,注意看data sheet,保证时钟和各个延迟满足要求即可-This code is to control the DS1302' s VHDL code, easy to understand, easy changes, note the data sheet, ensure the clock and can meet the requirements of the various delays
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Size: 2048 |
Author: kaishi |
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Description: 用Verilog HDL控制DS1302实现时钟功能,并显示在LED上-DS1302 with Verilog HDL control the clock function, and displayed on the LED on the
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Size: 197632 |
Author: xiong |
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Description: 基于VerilogHDL编写的时钟管理芯片DS1302实验开发程序。-VerilogHDL prepared based on clock management chips DS1302 experimental development program.
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Size: 736256 |
Author: sun pei |
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Description: verilog实现DS1302时钟控制,程序已验证没有问题 -verilog achieve DS1302 clock control procedures have been verified there is no problem
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Size: 921600 |
Author: mu langs |
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Description: DS1302的HDL控制代码哦,源代码哦-DS1302 control of HDL code Oh, oh source code
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Size: 2048 |
Author: Michael |
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Description: DS1302写读连用程序,可以设置要写的地址,Verilog语言,在板子上跑过的,可以实现功能的-DS1302 write read Ed program can be set to write the address of the Verilog language, in the board runs, can realize the function
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Size: 786432 |
Author: sendoc |
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Description: ds1302的verilog驱动,数码管显示-ds1302 s Verilog-driven, digital display
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Size: 64512 |
Author: 李生 |
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Description: 用 verilog语言 实现 DS1302 写时、分、秒 和 读 秒 并显示数码管上- driver program implementation of DS1302 chip by verilog
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Size: 23552 |
Author: whb |
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Description: 基于verilog语言的DS1302实时时钟驱动-DS1302 real-time clock driver based on Verilog language
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Size: 1024 |
Author: 王玲 |
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Description: 基于verilog HDL语言的模块程序,用于驱动ds1302时钟芯片-Based on verilog HDL language module program for driving ds1302 clock chip
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Size: 4491264 |
Author: 张明想 |
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Description: 基于FPGA与DS1302时钟芯片采用Verilog HDL语言编写的数字时钟实现-Based on FPGA and DS1302 clock chip using Verilog HDL language of the digital clock to achieve
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Size: 4452352 |
Author: 邹海春 |
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Description: 基于Verilog hdl的ds1302芯片的驱动程序-Ds1302 chip driver programme based on Verilog HDL.
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Size: 2048 |
Author: 刘邦 |
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Description: 基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。-DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.
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Size: 770048 |
Author: zyb |
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Description: 这个程序是基于fpga和ds1302的verilog代码,代码简洁明了,容易看懂。推荐大家学习-This program is based on fpga and ds1302 verilog code, code simple, easy to understand.Recommend everybody to learn
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Size: 11248640 |
Author: 晨风 |
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Description: 用Verilog语言编写的在FPGA上实现DS1302数码管显示时间的功能-Verilog DS1302.rar
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Size: 17123328 |
Author: 刘佳俊 |
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Description: 使用Verilog完成DS1302的驱动,工程已经经过测试,可直接使用。-DS1302 using Verilog complete drive, the project has been tested and can be used directly.
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Size: 625664 |
Author: joye |
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Description: FPGA实现ds1302的控制,用verilog语言编写,黑金开发板-The FPGA implementation of ds1302 control, written in verilog language, black gold development board
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Size: 5890048 |
Author: 罗强 |
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Description: FPGA控制ds1302,使用Verilog语言在quartus II环境下开发-FPGA verilog ds1302
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Size: 4096 |
Author: hero |
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Description: Altera开发板上面,运行OK的DS1302程序;(Altera flatform, dirve ds1302 device, test ok.)
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Size: 985088 |
Author: 武哥
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Description: 通过配置DS1302芯片来实现实时时钟的监测,我们通过通过控制2个按键来选择我们要在数码管上显示的时间,按下按键1我们来显示周几,按下按键2来显示年月日,不按显示时分秒,这样显示复合我们的数字表的显示(By configuring DS1302 chip to monitor the real-time clock, we select the time that we want to display on the digital tube by controlling 2 keys. Press key 1 to show the week, press the key 2 to show the year and month, not according to the display time, so that the display of the display of the display of our digital table.)
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Size: 356352 |
Author: 硅渣渣 |
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