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[Streaming Mpeg4] ddd

Description: DVB—S2中LDPC码编码器的FPGA设计与实现
Platform: | Size: 244894 | Author: sss | Hits:

[Embeded-SCM Develop] sdsdi

Description: DVB系统的SDI数据数据传输接口，FPGA设计实现
Platform: | Size: 229495 | Author: 梁光辉 | Hits:

[Compress-Decompress algrithms] rs_encoder

Description: 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。
Platform: | Size: 3630 | Author: 杨宇 | Hits:

[mpeg mp3] DVB-S

Description: asi 接口输出-asi interface output
Platform: | Size: 626688 | Author: 谢由超 | Hits:

[Streaming Mpeg4] ddd

Description: DVB—S2中LDPC码编码器的FPGA设计与实现-DVB-S2 in the LDPC code encoder FPGA Design and Implementation
Platform: | Size: 244736 | Author: sss | Hits:

[Embeded-SCM Develop] sdsdi

Description: DVB系统的SDI数据数据传输接口，FPGA设计实现-DVB system SDI data transmission interface, FPGA Design and Implementation
Platform: | Size: 229376 | Author: 梁光辉 | Hits:

[Compress-Decompress algrithms] rs_encoder

Description: 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。-A very good RS encoder for DVB Channel Coding using VHDL language, in the FPGA-validated.
Platform: | Size: 3072 | Author: 杨宇 | Hits:

[Streaming Mpeg4] Channel_coding_of_dvb-t_system

Description: DVB_T系统中信道编码的研究与FPGA实现，一篇很好的说是论文，caj阅读器浏览- Research and FPGA Implementation of Channel Coding in DVB-T Systems
Platform: | Size: 1945600 | Author: bai | Hits:

[Other systems] dvb-usb-opera1-fpga-01

Description: S100 Opera Package for
Platform: | Size: 16384 | Author: Nibles | Hits:

[Streaming Mpeg4] DVBT_TRANSMITER_SYSTEM_IMPLEMENTED_ON_FPGA

Description: 介绍DVB-T的发射通道设计，使用FPGA来实现COFDM调制。-DVBT TRANSMITER SYSTEM IMPLEMENTED ON FPGA
Platform: | Size: 135168 | Author: 老刘 | Hits:

[Other] DVB-H--code-and-fpga

Description: DVB_H信道编码调制的设计及其FPGA实现研究，供大家学习参考。-DVB_H channel coding modulation design and FPGA Realization for them to learn information.
Platform: | Size: 2475008 | Author: 颜琳 | Hits:

[Software Engineering] DDCFPGA

Description: 针对DVB-T标准ETSI EN 300 744 V1.5.1,设计了可用于DVB-T接收整机的多速率DDC模块,并在FPGA中仿真实现.在复用数字振荡混频模块的基础上,根据输入信号的不同带宽(6M/8MHz)选择不同的抽取滤波器组完成抽取因子为3或4的多速率处理任务,利用两级半带滤波器(HBF)级联完成4倍抽取滤波,单级奈奎斯特滤波器完成3倍抽取滤波.-For the DVB-T standard ETSI EN 300 744 V1.5.1, designed for DVB-T receiver machine multi-rate DDC module, and the simulation in the FPGA implementation. Numerical oscillation in the complex mixer module, based on the input signals of different bandwidths (6M/8MHz) choose a different group of complete decimation filter extracted factor 3 or 4 of the multi-rate processing tasks, using two half-band filter (HBF) cascade to complete four times decimation filter, single-stage Chennai Nyquist filter to complete three times the decimation filtering.
Platform: | Size: 309248 | Author: 王楚宏 | Hits:

[Program doc] DVB

Description: DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
Platform: | Size: 708608 | Author: 程钢 | Hits:

[Program doc] DVB_S2_LDPC_implementation

Description:
Platform: | Size: 4829184 | Author: 梅国强 | Hits:

[Program doc] RS3123

Description: Reed- So lomon (RS) 码是一种重要的纠错码, 它对随机性和突发性错误有极强的纠错能力, 广泛应用于 数字视频广播(DVB) 系统和其它数字通信领域。给出了一种GF (25) 域上的RS (31, 23) 编码器的实现算法, 介绍 了用现场可编程门阵列(FPGA ) 实现RS 编码器的原理和过程, 并给出了实现电路及其仿真的输出波形。-Reed-So lomon (RS) code is an important error-correcting code, its random and unexpected error has a strong error correction capabilities, widely used in digital video broadcasting (DVB) systems and other digital communications. Gives a GF (25) Domains RS (31, 23) algorithm of the encoder is introduced with a Field Programmable Gate Array (FPGA) RS encoder to achieve the principles and processes, and providing a circuit and simulation of the output waveform.
Platform: | Size: 360448 | Author: 王彬 | Hits:

[VHDL-FPGA-Verilog] xapp514_aes3-audio

Description: DVB数字音频接口(AESEBU)encoder源码,包括VHDL和VERILOG,基于XILINX FPGA,已验证.-AES-EBU interface,VHDL,VERILOG
Platform: | Size: 4483072 | Author: dcshl | Hits:

[VHDL-FPGA-Verilog] H.264_Technical_Primer

Description: 广播头端的FPGA的设计指导 帮助你顺利完成DVB的FPGA设计，-Broadcast head-end FPGA design guide to help you successfully complete the DVB' s FPGA design,
Platform: | Size: 292864 | Author: dou | Hits:

[VHDL-FPGA-Verilog] Analysis-Of-The-Dvb-Common-Scrambling-Algorithm.r

Description: Analysis of the DVB Common Scrambling Algorithm (DVB-CSA) on FPGA implementation. Performance and Security.
Platform: | Size: 177152 | Author: Birrax | Hits:

[Other] matlab实现dvbt2_syn

Description: DVB-T2帧同步模块，先做了matlab实现可以实现效果，再转到FPGA上进行了实现；里面还有复数小数转二进制以及二进制转复数小数的代码(The DVB-T2 frame synchronization module is implemented first by MATLAB, and it can achieve the effect. Then it is implemented on FPGA. There are also codes for complex decimal to binary and binary to plural decimal.)
Platform: | Size: 19456 | Author: 天晴见下雨不见 | Hits:

[Communication-Mobile] 16-QAM调制系统的FPGA实现

Description: 16-QAM调制系统的FPGA实现 正交幅度调制(QAM)由于具有很高的频谱利用率被DVB-C等标准选做主要的调制技术。与多进制PSK(MPSK)调制不 同，OAM调制采取幅度与相位相结合的方式，因而可以更充分地利用信号平面，从而在具有高频谱利用效率的同时可以获得比MPSK更低的误码率。(FPGA implementation of 16-QAM modulation system)
Platform: | Size: 1392640 | Author: JF1234 | Hits:
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