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Description: 4位可逆计数器：将50MHz的时钟进行 分频后的结果作为时钟控制，根据输入进行条件判断，再通过设置一个四位的向量将结果输出，利用数码管显示在实验板上-CNTR 4: will be conducted at 50MHz clock frequency as the clock after the control conditions to determine the basis of inputs, and then set up a four through the results of the vector output, digital display board in the experiment
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Size: 151552 |
Author: evelyn |
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Description: Multiplexer and demultiplexer from E1 to E3 stream
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Size: 6144 |
Author: sai |
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Description: E1信号到E3复用解复用VHDL代码包括时钟合成-E1 to E3 multiplexing & demultiplexing VHDL code, ，including clock synthesis
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Size: 16321536 |
Author: john |
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Description: framer Deframer core multiplexed 4 E1(E2)channel s to one E2(E3) stream at 8.448Mbps(34.368Mbps) rate .
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Size: 3072 |
Author: Oleg |
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Description: E3 -Mux / Demux - Multiplexer of 16 E1 Channels-E3 -Mux / Demux - Multiplexer of 16 E1 Channels
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Size: 7168 |
Author: qi |
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Description: example VHDL for spartan e3
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Size: 1069056 |
Author: Hang |
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Description: sqruare VHDL spartan E3-100 cp132
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Size: 1024 |
Author: chiara |
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