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[Other resource] source_files

Description: FPGA与DSP的EMIFA口接口程序.在FPGA内分配了两块双BUFFER与DSP进行通信.-FPGA and DSP EMIFA mouth interface program. The FPGA distribution within the two-SUBJECT ER and DSP communication.
Platform: | Size: 7081 | Author: tanbo | Hits:

[VHDL-FPGA-Verilog] source_files

Description: FPGA与DSP的EMIFA口接口程序.在FPGA内分配了两块双BUFFER与DSP进行通信.-FPGA and DSP EMIFA mouth interface program. The FPGA distribution within the two-SUBJECT ER and DSP communication.
Platform: | Size: 7168 | Author: tanbo | Hits:

[VHDL-FPGA-Verilog] DSP_EMIF_if

Description: fpga开发的程序，内容都不错，主要是top_test-FPGA development process, the contents are good, mainly top_test
Platform: | Size: 1024 | Author: bob | Hits:

[VHDL-FPGA-Verilog] write_rd

Description: 关于VHDL的 关于DSP的 emif-On VHDL on the DSP s EMIF
Platform: | Size: 91136 | Author: hanmy | Hits:

[VHDL-FPGA-Verilog] EMIFA-WRITE-AND-READ-WITH-CS

Description: FPGA EP3C16F484C8N与dsp TM320C6748 EMIFA之间的通信程序-the code of communication between FPGA EP3C16F484C8N and dsp TM320C6748 EMIFA
Platform: | Size: 2064384 | Author: 张 | Hits:

[DSP program] EMIFA_FPGA

Description: DSP和FPGA通过EMIFA接口通信,通过串口打印数据来观察，DSP向FPGA中写入数据，FPGA接收数据后加1，DSP读取处理后的数据并通过串口打印显示-DSP and FPGA interface communication via EMIFA, print data through the serial port to observe, write data to the FPGA, DSP, FPGA after receiving data plus 1, the data reading processing after DSP through the serial port and print display
Platform: | Size: 15360 | Author: 许辉 | Hits:

[DSP program] EMIFA_FPGA

Description: 通过DSP的EMIFA接口 与FPGA 通信(Communicate with FPGA through EMIFA interface of DSP)
Platform: | Size: 49152 | Author: Diane | Hits:

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