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[Software Engineering] EP1C6_EP1C12

Description: 这是一个以EP1C6为核心芯片的实验板原理图。希望对学习FPGA的朋友有帮助-this is a EP1C6 core chips for the experimental plate diagram. Hope to learn FPGA help of a friend
Platform: | Size: 51094 | Author: 进老夺 | Hits:

[Other resource] 816

Description: 9054+ep1c6+ad9887a VGA 图像采集完整版原理图
Platform: | Size: 96370 | Author: zxsa | Hits:

[Other resource] T2_USB_IN

Description: 我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 use输入模块的程序
Platform: | Size: 345155 | Author: 孙建军 | Hits:

[Software Engineering] EP1C6_EP1C12

Description: 这是一个以EP1C6为核心芯片的实验板原理图。希望对学习FPGA的朋友有帮助-this is a EP1C6 core chips for the experimental plate diagram. Hope to learn FPGA help of a friend
Platform: | Size: 51200 | Author: 进老夺 | Hits:

[Other Embeded program] 816

Description: 9054+ep1c6+ad9887a VGA 图像采集完整版原理图-9054+ Ep1c6+ Ad9887a VGA image capture the full version of Schematic
Platform: | Size: 96256 | Author: zxsa | Hits:

Description: 我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 use输入模块的程序-I bought a red hurricane FPGA, EP1C6 development board supporting USBA experimental input module routine use of procedures
Platform: | Size: 345088 | Author: 孙建军 | Hits:

[VHDL-FPGA-Verilog] T3_USB_OUT

Description: 我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 use输出模块的程序-I bought a red hurricane FPGA, EP1C6 development board supporting USBA experimental output module routine use of procedures
Platform: | Size: 875520 | Author: 孙建军 | Hits:

[VHDL-FPGA-Verilog] S4_LCD_V

Description: 我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 LCD模块的程序-I bought a red hurricane FPGA, EP1C6 development board supporting LCD module routines USBA experimental procedures
Platform: | Size: 930816 | Author: 孙建军 | Hits:

[VHDL-FPGA-Verilog] S6_VGA

Description: 我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 VGA模块的程序-I bought a red hurricane FPGA, EP1C6 development board supporting VGA module USBA experimental routine procedures
Platform: | Size: 3191808 | Author: 孙建军 | Hits:

[File Format] EP1C6(1)

Description: FPGA 原理图 FPGA 原理图-FPGA schematic FPGA Schematic
Platform: | Size: 1138688 | Author: gadan | Hits:

[Software Engineering] EP1C6_EP1C12

Description: Altera FPGA Cyclone I EP1C6 EP1C12 最小系统开发板 -the minimum system of Altera FPGA EP1C6 and or EP1C12
Platform: | Size: 51200 | Author: 长官林 | Hits:

[VHDL-FPGA-Verilog] pci_mcst

Description: ---简化版，实现PCI总线控制--- 器件：ep1c6 开发工具：QuartusII 功能：简化PCI总线接口，占用资源少；实现单路曼彻斯特码的收发。---- Starter Edition, to achieve control of PCI bus devices---: ep1c6 development tools: QuartusII functions: simplify PCI bus interface, occupy less resources the realization of single-channel transceiver Manchester.
Platform: | Size: 169984 | Author: l.s.m | Hits:

[VHDL-FPGA-Verilog] Windy_VGA_1c6

Description: 在cyclone EP1C6 上实现VGA 1028*768 16M色的显卡显示功能，而且还做了一个8色的VGA接口，可以实现双头输出。完整的QuartusII 工程，我也把相关的图片一起打包了。本人是作者，看不懂可联系：13802939662-In the cyclone EP1C6 achieve VGA 1028* 768 16M color graphics display, but also made an 8-color VGA interface, dual-head output can be achieved. QuartusII complete works, I also put the picture together with related packaging the. I am the author, can not read can contact: 13802939662
Platform: | Size: 1591296 | Author: 陈敏丰 | Hits:

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code1

Description: 此包中为FPGA学习板中的基础实验代码.共包括8个实验源代码:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机和四位比较器.-In this package for the FPGA board to study the basis of the experiment code. A total of eight experiments, including source code: 8-bit priority encoder, multipliers, multi-way selector switch BCD binary code, adder, subtracter, simple state machine and 4 comparator.
Platform: | Size: 1099776 | Author: sunxh092 | Hits:

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code2

Description: 此包为FPGA学习板接口实验程序源代码,共包括13个实验程序,有7段数码管,1602液晶显示,12864液晶显示,I2C总线,串口通信,拨码开关等.-The packet interface to FPGA board experimental procedure to study the source code, a total of 13 experimental procedure, there are 7-segment digital tube, 1602 LCD 12864 LCD, I2C bus, serial communication, DIP switch.
Platform: | Size: 4633600 | Author: sunxh092 | Hits:

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code3

Description: 此包为FPGA学习板的综合实验程序源代码,包括两个实验:交通灯和数字时钟.-This packet FPGA board to study a comprehensive experimental program source code, including two experiments: the traffic lights and digital clock.
Platform: | Size: 806912 | Author: sunxh092 | Hits:

[Documents] 11912911lunwen

Description: 本文主要介绍以EP1C3/EP1C6芯片进行十字路口的交通控制灯的设计，该系统可控制2个方向的红、黄、绿三盏灯,让其按特定的规律进行变化。用EP1C3/EP1C6作为交通控制灯的主控芯片，采用VHDL语言编写控制程序，利用MAX+PlusⅡ对设计结果进行仿真，发现系统工作性能良好。据此设计而成的硬件电路,也实现了控制要求。该设计展示了VHDL语言的强大功能和优秀特性。-This paper introduces the crossroads EP1C3/EP1C6 chip design of traffic control lights, the system can control the direction of two red, yellow, green, three lights, let the law be changed according to the specific. As a traffic control light with EP1C3/EP1C6 master chip, using VHDL language control program, using MAX+ Plus Ⅱ design simulation results and found that system works good performance. Accordingly designed with the hardware circuit, also achieved control requirements. The design shows the power of VHDL language and excellent features.
Platform: | Size: 300032 | Author: 灰太狼 | Hits:

[VHDL-FPGA-Verilog] T13_USB

Description: 本示例为基于FPGA红色飓风一代IDS-EP1C6/12开发板的USB传输，实现了pc端接收来自FPGA开发板的数据，并显示条纹，具体使用说明见解压后的说明文档。-This example is based on red hurricane generation FPGA development board' s USB transfer IDS-EP1C6/12 realized pc client receives the data from the FPGA development board and display stripes, detailed instructions, see the documentation after decompression.
Platform: | Size: 6283264 | Author: jiang | Hits:

[VHDL-FPGA-Verilog] ep1c6P80c52

Description: Altera FPGA cyclone EP1C6 + 80C52 实验板原理图-Altera FPGA cyclone EP1C6+ 80C52 Experiment Board Schematic
Platform: | Size: 134144 | Author: 绿风 | Hits:

[VHDL-FPGA-Verilog] da1_test

Description: ad转换，采用Altera Cyclone FPGA (EP1C6-PQ240)芯片，在QuartusII 9.0 下编译，有较好的参考价值，已通过测试。-ad conversion, using the Altera Cyclone FPGA (EP1C6-PQ240) chip, in QuartusII 9.0 compiler, a better reference value, has been tested.
Platform: | Size: 197632 | Author: gxu | Hits:

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[Software Engineering] EP1C6_EP1C12

[Other resource] 816

[Other resource] T2_USB_IN

[Software Engineering] EP1C6_EP1C12

[Other Embeded program] 816

[VHDL-FPGA-Verilog] T2_USB_IN

[VHDL-FPGA-Verilog] T3_USB_OUT

[VHDL-FPGA-Verilog] S4_LCD_V

[VHDL-FPGA-Verilog] S6_VGA

[File Format] EP1C6(1)

[Software Engineering] EP1C6_EP1C12

[VHDL-FPGA-Verilog] pci_mcst

[VHDL-FPGA-Verilog] Windy_VGA_1c6

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code1

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code2

[VHDL-FPGA-Verilog] Mars-EP1C6-F_code3

[Documents] 11912911lunwen

[VHDL-FPGA-Verilog] T13_USB

[VHDL-FPGA-Verilog] ep1c6P80c52

[VHDL-FPGA-Verilog] da1_test

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