Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - fft radix 4

Search list

[VHDL-FPGA-Verilog] verilog fft_64_12

Description: radix-4,利用cordic算法实现复乘单元
Platform: | Size: 13243 | Author: mikehonour@126.com | Hits:

[CSharp] fft1b1

Description: 基4快速傅立叶变换的实现方法 ,有多种,没有加密-Radix-4 Fast Fourier Transform method, a combination of factors, not encrypted
Platform: | Size: 165888 | Author: 鼎鼎 | Hits:

[Communication] fft_基2基4基8

Description: 基2基4基8以及分裂基的fft算法，代码效率很高。是难得一见的好代码。应用范围很广。-Radix-2-4-based 8 and split fft-based algorithm, a high code efficiency. Is a rare good code. Application of a very wide scope.
Platform: | Size: 76800 | Author: 张强 | Hits:

[DSP program] ligl-fft

Description: 基于tms320vc55*系列DSP常用算法，包括： 1. Experiment 7A - Radix-2 Complex FFT in C 2. Experiment 7B - Radix-2 Complex FFT in C55x Assembly Language 3. Experiment 7C - Radix-2 Complex FFT and IFFT 4. Experiment 7C - Fast Convolution 5. matlab 源码- Based on tms320vc55* series DSP commonly used algorithm, including: 1. Experiment 7A- Radix-2 Complex FFT in C 2. Experiment 7B- Radix-2 Complex FFT in C55x Assembly Language 3. Experiment 7C- Radix-2 Complex FFT and IFFT 4. Experiment 7C- Fast Convolution 5. matlab source code
Platform: | Size: 78848 | Author: | Hits:

[Algorithm] fix_fft

Description: 定点基2FFT，并且具有将定点FFT与浮点FFT比对的功能-sentinel radix 2 FFT, and will be positioned with floating-point FFT and FFT functions to the
Platform: | Size: 3072 | Author: 林凌 | Hits:

[matlab] radix-2FFT

Description: 基2FFT,是DFT(离散傅立叶变换)的快速算法-radix 2 FFT, DFT (Discrete Fourier Transform) Fast Algorithm
Platform: | Size: 1024 | Author: Terry | Hits:

[VHDL-FPGA-Verilog] 16Point-radix4-FFT

Description: 本文提出一個根值4 蝴蝶元素使用(m, n) - 櫃臺減少硬體複雜, 延遲時間, 和電力消費被介入在使用常規加法器。並且一臺修改過的換向器為FFT 算法被描述與用管道運輸的實施一起為連續輸入資料減少資料記憶要求。-This paper presents a root element of the use of 4 Butterfly (m, n)- the counter to reduce the hardware complexity, latency, and power consumption has been involved in the use of conventional adder. And a modified commutator for the FFT algorithm has been described with the use of pipeline transportation for the implementation of continuous input data together with information to reduce memory requirements.
Platform: | Size: 3072 | Author: 旻倫 | Hits:

[Mathimatics-Numerical algorithms] fft

Description: FFT算法的基本原理是把长序列的DFT逐次分解为较短序列的DFT。按照抽取方式的不同可分为DIT-FFT（按时间抽取）和DIF-FFT（按频率抽取）算法。按照蝶形运算的构成不同可分为基2、基4、基8以及任意因子（2n,n为大于1的整数），基2、基4算法较为常用。-FFT algorithm is the basic principle of DFT successive long sequence is broken down into shorter sequences of DFT. In accordance with the different extraction methods can be divided into the DIT-FFT (time taken) and the DIF-FFT (according to the frequency of extraction) algorithm. In accordance with the composition of different butterfly operations can be divided into base 2, base 4, base 8, as well as arbitrary factor (2n, n is an integer greater than 1), radix-2, Radix-4 algorithm is more commonly used.
Platform: | Size: 1024 | Author: 李文 | Hits:

[VHDL-FPGA-Verilog] VLSIFFTRadix2forDSP

Description: VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application
Platform: | Size: 247808 | Author: bonjour | Hits:

[Algorithm] fixed_struc_radix4_fft

Description: 采用固定寻址方式的固定结构基4FFT仿真代码-Radix 4 FFT with fixed address structure
Platform: | Size: 9216 | Author: timtian | Hits:

[VHDL-FPGA-Verilog] fft_1024_hdl

Description: 一个 1024 点 FFT ， 基 4 蝶形运算架构， 5级流水，乒乓内存，有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
Platform: | Size: 18432 | Author: wei | Hits:

[DSP program] Radix-4FFTforTMS320C6000

Description: 用TI DSP芯片TMS320C6000实现FFT算法 内含程序代码和说明 The radix-4 FFT-Fixed-point digital signal processors (DSPs) have limited dynamic range to deal with digital data. This application report proposes a scheme to test and scale the result output from each Fast Fourier Transform (FFT) stage in order to fix the accumulation overflow. The radix-4 FFT algorithm is selected since it provides fewer stages than radix-2 algorithm. Thus, the scaling operations are minimized. This application report is organized as follows:
Platform: | Size: 53248 | Author: 防止 | Hits:

[Embeded-SCM Develop] fft-arm

Description: 一个用于ARM的基4/基5定点FFT算法，原作者是JDB，后来我扩展过16和256点的计算并用在项目中了，感觉速度还不错。现在重写了基于Linux GCC4的测试程序，可供使用者评估参考。建议安装FFTW3用来精确评估测试结果，相关范例已经在代码中了。-Radix 4/5 FFT routines supporting 16/64/256 and 20/80 calculations. The source originally contributed by JDB, I had extended 16 and 256 candidates and used it in our project it has been verified as fast and stable. Now we add some test vectors running on Linux with GCC 4 for testers who want to use or just evaluate it. Installing FFTW3 is recommended for evaluating the code exactly.
Platform: | Size: 242688 | Author: Tony Gibson | Hits:

[VHDL-FPGA-Verilog] cfft4

Description: fft radix-4 VHDL for expanding to any fourier transform
Platform: | Size: 1024 | Author: delta | Hits:

[VHDL-FPGA-Verilog] cfft4X12

Description: fft radix-4 for expanding to any fourier transform
Platform: | Size: 1024 | Author: delta | Hits:

[VHDL-FPGA-Verilog] FFT_Implementation_in_FPGA

Description: This book is ERICSSON documentation "FFT, REALIZATION AND IMPLEMENTATION IN FPGA". Book includes some theoretical information about FFT Radix-2 and Radix-4, and also VHDL and Matlab code.
Platform: | Size: 297984 | Author: Anta | Hits:

[VHDL-FPGA-Verilog] cFFT

Description: CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be different from the standard FFT algorithm. This variation in gain is not important for orthogonal frequency division modulation (OFDM) and demodulation. The gain can be corrected, to that of a conventional FFT, by applying a constant multiplying factor.
Platform: | Size: 183296 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] FFT

Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 64-point FFT in VHDL. Radix 2 Decimation in Frequency i am found of it.It s really very good!
Platform: | Size: 31744 | Author: 小鸟动人 | Hits:

[VHDL-FPGA-Verilog] gam3

Description: FPGA Implementation ofLow Power 64-Point Radix-4 FFT Processor for OFDM System
Platform: | Size: 145408 | Author: rams | Hits:

[VHDL-FPGA-Verilog] datasheet

Description: Implementing the Radix-4 Decimation in Frequency (DIF) Fast Fourier Transform (FFT) Algorithm Using a TMS320C80 DSP
Platform: | Size: 150528 | Author: seojinwon | Hits:
« 12 3 4 5 »

CodeBus www.codebus.net