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[VHDL-FPGA-Verilog] simple_fifo

Description: verilog HDL原码 一种简单的同步FIFO原码，可以被综合-verilog HDL original code a simple synchronous FIFO original code, which can be integrated
Platform: | Size: 1024 | Author: zxz | Hits:

[Com Port] simple_spi

Description: 一个简单的ＳＰＩ　ＩＰ核，SPI Core Specifications　可以从说明文档中找到！ The simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous communication protocol that requires a minimum of 3 wires. FEATURES: · Compatible with Motorola’s SPI specifications · Enhanced M68HC11 Serial Peripheral Interface · 4 entries deep read FIFO · 4 entries deep write FIFO · Interrupt generation after 1, 2, 3, or 4 transferred bytes · 8 bit WISHBONE RevB.3 Classic interface · Operates from a wide range of input clock frequencies · Static synchronous design · Fully synthesizable -a simple SPI IP core, SPI Core Specifications from documentation found! The simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral In terface found on Motorola's M68HC11 family of CP Us. The Serial Peripheral Interface is a serial , synchronous communication protocol that're quires a minimum of three wires. FEATURES : Compatible with Motorola's SPI specificatio ns Enhanced Serial Peripheral Interf M68HC11 ace four entries deep FIFO read four entries deep wri te FIFO Interrupt generation after 1, 2, 3, 4 or 8 bit bytes transferred RevB.3 Cl WISHBONE assic interface Operates from a wide range of i nput clock frequencies Static synchronous de sign Fully synthesizable
Platform: | Size: 473088 | Author: Jack | Hits:

[VHDL-FPGA-Verilog] hdl

Description: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control
Platform: | Size: 6144 | Author: 刘义春 | Hits:

[VHDL-FPGA-Verilog] AD0809

Description:
Platform: | Size: 4339712 | Author: 侯训平 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 用VERILOG写的FIFO程序，可以直接引用经本人测试-VERILOG written using FIFO procedures, can be directly invoked by the I test
Platform: | Size: 1125376 | Author: 李俭 | Hits:

[VHDL-FPGA-Verilog] FPGA_FIFO

Description: 使用Verilog编写的同步FIFO，可通过设置程序中的DEPTH设置FIFO的深度，FIFO_WRITE_CLOCK上升沿向FIFO中写入数据， FIFO_READ_CLOCK上升沿读取数据。本程序对FIFO上层操作简单实用。-Prepared by the use of Verilog synchronous FIFO, through the setup program in the FIFO depth DEPTH settings, FIFO_WRITE_CLOCK rising edge to the FIFO write data, FIFO_READ_CLOCK rising edge of read data. This procedure on the upper FIFO operation simple and practical.
Platform: | Size: 1024 | Author: 张键 | Hits:

[VHDL-FPGA-Verilog] use_SRAM_design_FIFO.pdf

Description: 利用sram技术设计的一个FIFO-failed to translate
Platform: | Size: 19456 | Author: jiangp | Hits:

[Other] Memory

Description: Example of a FIFO code in verilog language, to control a bus. With a memory stack and a testbench.
Platform: | Size: 846848 | Author: Lokous | Hits:

[VHDL-FPGA-Verilog] xapp460

Description: 利用FPGA实现TMDS接口标准，可用于DVI以及HDMI接口的FPGA实现（含文档）-Video Connectivity Using TMDS I/O in Spartan-3A FPGAs
Platform: | Size: 1594368 | Author: wicky | Hits:

[OS Develop] AD7864

Description: 这是对上次AD7864采样程序的改进，增加了FIFO的编程，功能比上次源码更加完善！-This sourse is modified and I have added the program of FIFO,so its function is better then privious one.I hope it is helpful for you!
Platform: | Size: 771072 | Author: zhuyujie | Hits:

[VHDL-FPGA-Verilog] async_fifo

Description: verilog HDL写的异步fifo代码及测试平台，直接可用，可生成RTL代码-asynchronous fifo write verilog HDL code and test platform, directly available, can generate RTL code for
Platform: | Size: 62464 | Author: 张晗 | Hits:

[Other] FIFO

Description: verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
Platform: | Size: 176128 | Author: haha | Hits:

[VHDL-FPGA-Verilog] fifo-verilog

Description: 自己设计的一种FIFO寄存器，用verilog 编写，QUARTUS II下验证-Own design of a FIFO register, with verilog preparation, QUARTUS II certification under
Platform: | Size: 5120 | Author: wait | Hits:

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