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[Other] mp3_decoder

Description: mp3的VHDL实现，包括HUFFMAN编码器，量化器，子带滤波器．可用来开发：ＦＰＧＡ，ＡＳＩＣ．-mp3 of VHDL, including HUFFMAN encoder, quantizer, subband filters. Can be used to develop : FPGA, ASIC.
Platform: | Size: 36864 | Author: 六六 | Hits:

[Software Engineering] filter-vhdl-code

Description: filter-vhdl-code.rar为滤波器的完整VHDL程序，可用于IIR与FIR滤波器的仿真与验证实现，包括代码综合。使用版本为ISE6.3.-filter-vhdl-code.rar for the integrity of filter VHDL procedures, can be used for IIR and FIR filters realize simulation and verification, including an integrated code. Use version ISE6.3.
Platform: | Size: 173056 | Author: petri | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 此文件包括FIR滤波器的设计对EDA的介绍，以及用VHDL语言实现FIR滤波器的FPGA实现-This document includes the design of FIR filters on the EDA
Platform: | Size: 2531328 | Author: solor1985 | Hits:

[VHDL-FPGA-Verilog] New_HighSpeed_FIR_S_P

Description: 新型串并架构的高速FIR滤波器,对研究VHDL实现FIR的朋友有用处-New type of string and structure of high-speed FIR filters, the study of VHDL friends realize FIR has useful
Platform: | Size: 12288 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] fir

Description: 滤波器的vhdl实现 滤波器的vhdl实现-Filter VHDL VHDL realization of filters to achieve
Platform: | Size: 1024 | Author: 阿乔 | Hits:

[Compress-Decompress algrithms] vhdlandfir

Description: 介绍数字滤波器的设计，采用vhdl程序编写。 内容全面。-Introduce the design of digital filters using VHDL programming. Comprehensive.
Platform: | Size: 173056 | Author: wuyub | Hits:

[DSP program] fir

Description: 本设计用verilog代码实现FIR滤波器！-Verilog code of the design FIR filters to achieve!
Platform: | Size: 1024 | Author: yuming | Hits:

[VHDL-FPGA-Verilog] DDC_CIC

Description: 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
Platform: | Size: 50176 | Author: 达 | Hits:

[Software Engineering] Digital_Filter_implementation_by_FPGA

Description: 1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis 2. fpga implemention of a median filter 3. fpga implementation of digital filters 4.hardware acceleration of edge detection algorithm on fpgas 5.implementation and evaluation of image processing algorithms on reconfigurable architecture using C-based hardware descriptive languages 6. implementing 2D median filter in fpgas 7.视频图像处理与分析的网络资源
Platform: | Size: 1969152 | Author: carol | Hits:

[VHDL-FPGA-Verilog] hilbert_transformer_latest.tar

Description: The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it possible to approximate the Hilbert Transform with a digital filter. Due to the non-causal and infinite impulse response of that filter, it is not that easy to get a good approximation with low hardware resource usage. Therefore, different filters with different complexities have been implemented. The detailed discussion can be found in "Digital Hilbert Transformers or FPGA-based Phase-Locked Loops" (http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4629940). The design is fully pipelined for maximum throughput.
Platform: | Size: 1239040 | Author: Arun | Hits:

[Special Effects] FIR

Description:
Platform: | Size: 5120 | Author: 司令 | Hits:

[Other] filter

Description: 滤波器的概念阐述，及一些常用的设计方法，主要用在数字系统中-Explained the concept of filters, and some commonly used design methods, mainly used in digital systems
Platform: | Size: 178176 | Author: li | Hits:

[Other] fir

Description: 只是一个8阶的fir滤波器，希望对大家有用-Only an 8-band fir filters, useful for all of us hope
Platform: | Size: 407552 | Author: yyl | Hits:

[Other] ChargePumpPLL

Description: An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase- Frequency Detector and a current switch charge pump.-An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase-Frequency Detector and a current switch charge pump.
Platform: | Size: 129024 | Author: 刘洋 | Hits:

[DSP program] fri

Description: 滤波器的设计的，用于FIR滤波器的设计和应用-The design of filters for the FIR filter design and application
Platform: | Size: 650240 | Author: qian | Hits:

[VHDL-FPGA-Verilog] filter_vhdl

Description: vhdl语言编写的fir和iir滤波器程序。在quartus上仿真通过。-vhdl language program fir and iir filters. Quartus adopted in the simulation.
Platform: | Size: 37888 | Author: lmy | Hits:

[VHDL-FPGA-Verilog] MyFilter

Description: FPGA实现数字滤波器，用VHDL语言实现的直接1型FIR滤波器，具有较好的参考价值。-FPGA realization of digital filters using VHDL language to achieve the direct FIR filter type 1, has a good reference value.
Platform: | Size: 2048 | Author: 胡佳 | Hits:

[Other] VHDL

Description: 数字信号处理的FPGA实现,包括滤波器和DTF，FTT原理-FPGA realization of digital signal processing, including filters and DTF, FTT principle of
Platform: | Size: 182272 | Author: wlcwjy | Hits:

[VHDL-FPGA-Verilog] FPGA-Prototyping-by-VHDL-Examples---Xilinx-Sparta

Description: FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others-FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others
Platform: | Size: 16619520 | Author: Aleks | Hits:

[Other] VHDL-FIR-filters

Description: ynthesizable FIR filters in VHDL with a focus on optimal mapping to Xilinx DSP slices. This repository contains a transposed direct form, systolic form for single-rate FIR filters and a custom parallel polyphase FIR decimating filter. The VHDL has been synthesized with Xilinx Vivado 2015.1 to confirm the correct DSP cascade chain is inferred.
Platform: | Size: 37888 | Author: Abkoti | Hits:
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