Search - fir filter in fpga

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-Verilog] FPGA_FIR

Description: VHDL语言编写的FIR滤波器源码对于嵌入式设计者有很好的指导作用 -VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
Platform: | Size: 152576 | Author: 冯申 | Hits:

[Other Embeded program] 01_GettingStarted

Description: This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken from the AccelDSP Examples directory.-This exercise will guide y ou through the step-by-step process of transfo rming a MATLAB floating-point model into a hard ware module that can be implemented in silicon ( FPGA or ASIC). The design is a general purpose FI R filter taken from the AccelDSP Examples direc tory.
Platform: | Size: 5120 | Author: 杨平 | Hits:

[VHDL-FPGA-Verilog] fir

Description: FIR数字滤波器程序，采用vhdl编写，可用于FPGA电路-FIR digital filter procedure for the preparation of VHDL can be used in FPGA circuit
Platform: | Size: 173056 | Author: zhao onely | Hits:

[VHDL-FPGA-Verilog] ImproveddesignofCICfilteranditsimplementationonFPG

Description: 。介绍了内插器和抽取器这2种CIC滤波器各自的结构与性能，从数学上分析了其性能及其与FIR 滤波器的关系，从频域上展示了其本质。并讨论其内部寄存器的最小位宽与溢出保护，最后介绍了抽取器与内插器分别在FPGA上的一般实现方法，并指出了一些提高实现性能的措施与建议-. Introduction of the interpolation and Extractor This two kinds of CIC filter structure and properties of their respective, from the mathematical analysis of its performance and its relationship with the FIR filter, from the frequency domain to display its essence. And to discuss its internal register with the smallest bit overflow protection, and finally introduce the Extractor and interpolator, respectively, in the FPGA to achieve the general methods, and pointed out that a number of measures to improve performance and recommendations
Platform: | Size: 124928 | Author: 会飞的鱼 | Hits:

[Embeded-SCM Develop] FIR

Description: 主要讲述了FPGA在数字滤波器特别是FIR滤波器方面的设计，仿真以及实现，还分别介绍了乘法加法的原理及框图-Focuses on the FPGA in the digital filter in particular aspects of FIR filter design, simulation and realization, but also introduced the principle of addition and multiplication diagram
Platform: | Size: 4199424 | Author: aaa | Hits:

[VHDL-FPGA-Verilog] DIGTAL_FIR

Description: 环路滤波器的设计，基于FPGA的锁相环应用。-Loop filter design, FPGA-based PLL applications.
Platform: | Size: 774144 | Author: 梁大法 | Hits:

[VHDL-FPGA-Verilog] DA_FIR

Description: 基于分布式算法的FPGA实现的FIR滤波器源码，VHDL语言编写的，下载工程文件后可直接在QuartusII7.0上运行。-Based on Distributed algorithms realize the FIR filter FPGA source code, VHDL language, download the project file can be run directly in QuartusII7.0.
Platform: | Size: 531456 | Author: CH | Hits:

[VHDL-FPGA-Verilog] fir_lms

Description: 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
Platform: | Size: 12288 | Author: 田文军 | Hits:

[Technology Management] FPGAANDFILTER

Description: FIR数字滤波器设计FPGA实现的研究。流水线技术在文中得到了应用，提高了数据处理的速度-FIR digital filter design FPGA realization of research. Lines in the text has been applied to improve the speed of data processing
Platform: | Size: 80896 | Author: AndyLee | Hits:

[VHDL-FPGA-Verilog] FIR_Filter_Base_on_FPGA

Description: 详尽的讲述了FIR滤波器在FPGA上的实现思路-Detailed story of the FIR filter in FPGA realization of ideas
Platform: | Size: 358400 | Author: yeping | Hits:

[VHDL-FPGA-Verilog] TheDesignofFIRFilterBasedonFPGA

Description: 从分析FIR 数字滤波器的原理和设计方法入手,主要针对基于FPGA 实现数字滤波器乘法器的算法进行了比较研究,并通过一个8 阶FIR 低通滤波器的具体设计,简要分析比较了几种算法的优越性和缺点,从而充分发掘和利用FPGA 的高速特性。-From the analysis of FIR digital filter design theory and approach, mainly based on the realization of digital filter FPGA multiplier comparative study of algorithms, and through an 8-order FIR low-pass filter specific design, a brief analysis and comparison of several advantages and disadvantages of the algorithm in order to fully explore and make use of FPGA high-speed characteristics.
Platform: | Size: 6372352 | Author: xxxmmmccc | Hits:

[Software Engineering] jifenlvboqi

Description: 为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术.多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器.在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过Quartus Ⅱ的时序仿真分析得以验证,实际中可以推广应用.-In order to solve software-defined radio communications system after IF sampling of great amount of data to the DSP in the baseband processor part of the calculation of the pressure, often using multi-rate processing technology. Multi-rate processing need to use the integrator comb filter, half-band filters and high-order FIR filter. in the analysis of the integrator comb filter structure and characteristics, based on the multi-stage CIC filter described an efficient FPGA implementations, the correctness and feasibility of the method adopted by the timing Quartus Ⅱ simulation analysis can be verified in practice can be applied.
Platform: | Size: 180224 | Author: 王楚宏 | Hits:

[VHDL-FPGA-Verilog] LMS_filter

Description: verilog HDL 写的LMS滤波器-LMS filter using verilog HDL language
Platform: | Size: 350208 | Author: rayax | Hits:

[VHDL-FPGA-Verilog] VHDL_FIR_PRO_scr

Description: 可编程的FIR滤波器VHDL实现，只要输入FIR的阶数以及系数，就可在FPGA中实现FIR滤波器-Programmable FIR filter VHDL implementation, simply enter the order number as well as the FIR coefficients, we can implement FIR filters in FPGA
Platform: | Size: 3072 | Author: wuyihua | Hits:

[Books] fir

Description: 本文以软件无线电为指导，提出基于CORDIC算法利用FPGA平台数字下变频器设计方案。首先分析下变频器的结构；然后采用模块化设计思想，将数字下变频的功能模块包括数字控制振荡器、CIC抽取滤波、HBF抽取滤波器、FIR低通滤波器进行分析和FPGA的设计；最后在 MATLAB/DSPBuilder下硬件仿真模块进行仿真并给出仿真结果。-In this paper, software-defined radio as the guidance, based on the CORDIC algorithm uses the FPGA platform, digital down-converter design. First analyzes the structure of down-converter and then use a modular design concept, the digital down-conversion function modules including digital controlled oscillator, CIC decimation filtering, HBF decimation filter, FIR low-pass filter for analysis and FPGA design the final In the MATLAB/DSPBuilder under the hardware emulation module simulation and simulation results.
Platform: | Size: 201728 | Author: jiang | Hits:

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[DSP program] TMS320C54x DSP 的cpu和外围设备

[VHDL-FPGA-Verilog] FPGA_FIR

[Other Embeded program] 01_GettingStarted

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] ImproveddesignofCICfilteranditsimplementationonFPG

[Embeded-SCM Develop] FIR

[VHDL-FPGA-Verilog] DIGTAL_FIR

[VHDL-FPGA-Verilog] DA_FIR

[VHDL-FPGA-Verilog] fir_lms

[Technology Management] FPGAANDFILTER

[VHDL-FPGA-Verilog] FIR_Filter_Base_on_FPGA

[VHDL-FPGA-Verilog] TheDesignofFIRFilterBasedonFPGA

[Software Engineering] jifenlvboqi

[VHDL-FPGA-Verilog] LMS_filter

[VHDL-FPGA-Verilog] VHDL_FIR_PRO_scr

[Books] fir

[VHDL-FPGA-Verilog] fir

[DSP program] fir-filter-in-Matlab-and-Modelsim

[VHDL-FPGA-Verilog] fir filter design

[VHDL-FPGA-Verilog] FIR设计实现sgh

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