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[Other resource] PART2-FLEX

Description: altera关于hardcopy的资料PPT格式的 第二部分
Platform: | Size: 5941682 | Author: hubin | Hits:

[Other resource] RS422

Description: 这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10K上通过了测试
Platform: | Size: 1586231 | Author: 徐 | Hits:

[Other] PART2-FLEX

Description: altera关于hardcopy的资料PPT格式的 第二部分-altera information on the hardcopy of the second part of PPT format
Platform: | Size: 5941248 | Author: hubin | Hits:

[Embeded-SCM Develop] I2Caltera

Description: 总线控制器 altera提供的FPGA源代码，实用-Altera provided bus controller FPGA source code, utility
Platform: | Size: 43008 | Author: sfskhfksj | Hits:

[VHDL-FPGA-Verilog] RS422

Description: 这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10K上通过了测试-This is a VHDL development with RS422 communication procedures, in the ALTERA FLEX EPF10K passed the test
Platform: | Size: 1586176 | Author: 徐 | Hits:

[VHDL-FPGA-Verilog] a_block_with_several_functions_with_Verilog_HDL.ra

Description: Verilog是广泛应用的硬件描述语言，可以用在硬件设计流程的建模、综合和模拟等多个阶段。随着硬件设计规模的不断扩大，应用硬件描述语言进行描述的CPLD结构，成为设计专用集成电路和其他集成电路的主流。通过应用Verilog HDL对多功能电子钟的设计，达到对Verilog HDL的理解，同时对CPLD器件进行简要了解。 本文的研究内容包括: 对Altera公司Flex 10K系列的EPF10K 10简要介绍，Altera公司软件Max+plusⅡ简要介绍和应用Verilog HDL对多功能电子钟进行设计。 -Verilog is the most widely used hardware description language.It can be used to the modeling, synthesis, and simulation stages of the hardware system design flow. With the scale of hardware design continually enlarging, describing the CPLD with HDL become the mainstream of designing ASIC and other IC.To comprehend Verilog HDL and get some knowledge of CPLD device, we design a block with several functions with Verilog HDL. This thesis is about to discuss the above there aspects: Introduce the EPF10K 10 of Flex 10K series producted by Altera Corporation simply. the software Max+plusⅡ,Design the block with several functions with Verilog HDL.
Platform: | Size: 482304 | Author: li | Hits:

[Other] flex

Description: FPGA，altera，flex10k10l数据手册 -flex10k10l data sheet
Platform: | Size: 729088 | Author: Linwen | Hits:

[Program doc] alterafkex

Description: fpga design altera flex notes
Platform: | Size: 334848 | Author: atul | Hits:

[Other] DDS

Description: 利用现场可编程逻辑门阵列FPGA实现直接数字频率合成（DDS）的原理，以及以DDS为核心的信号发生器。探讨DDS技术在FPGA中 的实现方法，提出采用ALTERA公司的FLEX系列FPGA芯片FLEX10K进行直接数字频率合成的VHDL源程序。-The use of field-programmable gate array FPGA to realize the principle of the direct digital frequency synthesis (DDS) DDS as the core of the signal generator. DDS technology in the FPGA implementation method proposed the FLEX series FPGA chip FLEX10K ALTERA Company VHDL source code for direct digital frequency synthesis.
Platform: | Size: 3424256 | Author: fml | Hits:

[Software Engineering] DSP-with-FPGAs

Description: Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing digital signal processing in the manner that programmable digital signal processors (PDSPs) did nearly two decades ago. Many front-end digital signal processing (DSP) algorithms, such as FFTs, FIR or IIR filters, to name just a few, previously built with ASICs or PDSPs, are now most often replaced by FPGAs. Modern FPGA families provide DSP arithmetic support with fast-carry chains (Xilinx Virtex, Altera FLEX) that are used to implement multiply-accumulates (MACs) at high speed, with low overhead and low costs [1]. Previous FPGA families have most often targeted TTL “glue logic” and did not have the high gate count needed for DSP functions. The efficient implementation of these front-end algorithms is the main goal of this book.
Platform: | Size: 8656896 | Author: Alexander | Hits:

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