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[
Windows Develop
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VFloat_lib_Nov14_2007
Description:
遵循 IEEE 754 标准的浮点运算 库 内含 denorm norm fp_add/sub fp_mult fp_devision 可以快速模拟单双精度浮点运算 导师授权使用 -Follow the IEEE 754 standard floating point library includes denorm norm fp_add/sub fp_mult fp_devision can quickly simulate single-and double-precision floating-point operations instructors are authorized to use
Platform:
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Size:
64512
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Author:
david
|
Hits:
[
VHDL-FPGA-Verilog
]
add(FLP)
Description:
一个32位元的浮点数加法器,可将两IEEE 754格式内的值进行相加-A 32-bit floating-point adder can be both within the IEEE 754 format to add value
Platform:
|
Size:
10240
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Author:
TTJ
|
Hits:
[
VHDL-FPGA-Verilog
]
mul(FLP)
Description:
一个32位元的浮点数乘法器,可将两IEEE 754格式的值进行相乘-A 32-bit floating-point multipliers, can be two format IEEE 754 values multiplied
Platform:
|
Size:
2048
|
Author:
TTJ
|
Hits:
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