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[VHDL-FPGA-Verilog] BUFG_CLK2X_SUBM

Description: xilinx DCM 应用程序，完全可用-xilinx DCM applications, fully available
Platform: | Size: 1024 | Author: 娃娃 | Hits:

[VHDL-FPGA-Verilog] DCM

Description: ISE实现DCM组建例化，得到3倍频时钟-ISE to achieve established cases of DCM, received 3 octave clock
Platform: | Size: 370688 | Author: ll | Hits:

[VHDL-FPGA-Verilog] DCM

Description: xilinx SP605开发板的DCM模块验证程序，coreGen工具生成DCM核，由DCM完成时钟分频、倍频、移相等操作-xilinx SP605 development board DCM module validation program, coreGen tool to generate nuclear DCM, completed by the DCM clock divider, frequency, and shift operations equal
Platform: | Size: 2599936 | Author: wangyu | Hits:

[VHDL-FPGA-Verilog] double_dcm

Description: 这个主要是在xilinx FPGA中双DCM连接的问题，这个问题网上资料很少，自己研究后并且仿真之后可以实现两个dcm的正常工作，实现倍频和时钟的反相-This is mainly the double in xilinx FPGA DCM connection problem which little information online, their own studies and simulation can be achieved after the normal work of the two dcm achieve clock frequency and the inverse
Platform: | Size: 80896 | Author: 张元甲 | Hits:

[VHDL-FPGA-Verilog] DCM

Description: 详细介绍了基于XILINX公司FPGA时钟管理模块DCM的IP核生成和使用-xilinx ise DCM
Platform: | Size: 621568 | Author: mawei | Hits:

[VHDL-FPGA-Verilog] dcm_test2

Description: xilinx fpga 倍频的例子，包含整个工程， 如果去用ISE 实现倍频，dcm 用法-xilinx s FPGA dcm example
Platform: | Size: 315392 | Author: 林端 | Hits:

[VHDL-FPGA-Verilog] TEST1

Description: Xilinx FPGA中DCM的用法，采用创建一个IP的方法。-Use DCM module in Xilinx FPGA.Creat a IP module to do it.
Platform: | Size: 582656 | Author: dxf | Hits:

[VHDL-FPGA-Verilog] DCM

Description: fpga DCM使用教程 好几个文档 帮助您一次学会使用DCM-fpga the DCM using the tutorial a few documents to help you first learn to use the DCM
Platform: | Size: 2197504 | Author: 朱飞亚 | Hits:

[VHDL-FPGA-Verilog] RELOJES

Description: SHOWS HOW TO CONFIGURE A DCM ON A SPARTAN FPGA
Platform: | Size: 1024 | Author: Cian | Hits:

[assembly language] mydcm1

Description: 基于verilog的FPGA里dcm模块分频偏移程序-dcm Frequency offset
Platform: | Size: 1024 | Author: 居里夫人 | Hits:

[VHDL-FPGA-Verilog] dac904_lock

Description: 采用xilinx的FPGA的DCM IP核进行开发的DA程序。-Using the xilinx FPGA-DCM IP core for the development of DA procedures.
Platform: | Size: 723968 | Author: 张兴 | Hits:

[VHDL-FPGA-Verilog] sss

Description: 使用Verilog语言编写源代码.调用一些基本的IP核，如DCM模块、DDS模块ChipScope模块、乘法器模块等来实现调制.最后通过编程并利用FPGA板子实现AM、DBS、SSB的调制。-Using Verilog language source code. Invoke some basic IP cores, such as DCM module, DDS module ChipScope modules, multiplier module to achieve modulation. Finally realize AM, DBS, SSB modulation by programming and the use of FPGA board.
Platform: | Size: 1825792 | Author: Blus | Hits:

[Other] VGA_1

Description: 基于FPGA的VGA显示矩形框，调用DCM ip，对初学者十分有用-FPGA-based VGA display rectangle, call DCM ip, very useful for beginners
Platform: | Size: 692224 | Author: 周德福 | Hits:

[VHDL-FPGA-Verilog] CLK_GEN

Description: Xilinx FPGA时钟倍频电路，使用内部全局时钟、DCM，可参数化。-Clock Generater for Xilinx FPGA
Platform: | Size: 2048 | Author: zhang mr | Hits:

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