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Description: 一个verilog实现的crc校验,用于fpga实现,快速,准确有效
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Size: 1440278 |
Author: 枫叶鹏 |
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Description: FPGA实现差错控制编码技术,非常不错的一篇毕业论文,很详细,推荐
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Size: 431527 |
Author: mediative |
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Description: 基于FPGA的crc设计,有一定的参考价值,写的比较详细
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Size: 18522 |
Author: qlg |
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Description: crc 校验
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Size: 31740 |
Author: caogen |
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Description: 能综合的YCrCb2RGB模块(verilog)_采用3级流水线,用fpga做小数运算,还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology
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Size: 1024 |
Author: 于飞 |
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Description: 利用VHDL语言编写的一个crc功能模块,可下载到FPGA实现功能-use VHDL to prepare a crc function of the module, which can be downloaded to the FPGA functions
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Size: 3072 |
Author: 黎飞飞 |
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Description: 多项式为x^8+x^5+x^4+1的CRC(循环冗余校验码)的FPGA设计。-polynomial x 8 x ^ x ^ ^ 5 4 1 CRC (cyclic redundancy check code) FPGA design.
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Size: 1024 |
Author: zhao |
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Description: 一个verilog实现的crc校验,用于fpga实现,快速,准确有效-A Verilog realize the CRC checksum for the FPGA realization, rapid, accurate and effective
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Size: 1440768 |
Author: 枫叶鹏 |
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Description: PCI express CRC rtl core for Fpga/asic Designer
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Size: 202752 |
Author: 李晓媛 |
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Description: VHDL语言实现的CRC码程序,可用于FPGA实现-VHDL language procedures realize the CRC code can be used to realize FPGA
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Size: 114688 |
Author: 陈楚龙 |
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Description: FPGA实现差错控制编码技术,非常不错的一篇毕业论文,很详细,推荐-FPGA realization of error control coding techniques, a very good dissertation, I am very detailed and recommended
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Size: 431104 |
Author: mediative |
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Description: CRC校验码并行计算的FPGA实现,PDF打开-CRC Check Code FPGA realize parallel computing, PDF to open
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Size: 231424 |
Author: pipi_dog |
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Description: 基于FPGA的crc设计,有一定的参考价值,写的比较详细-CRC FPGA-based design, has a certain reference value, a more detailed written
Platform: |
Size: 18432 |
Author: qlg |
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Description: 这是一个在FPGA上实现CRC算法的程序,包含了CRC-8,CRC-12,CRC-16,CRC-CCIT,CRC-32一共五种校验形式。-err
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Size: 10240 |
Author: 李奥运 |
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Description: 用FPGA实现CRC算法,只用一个脉冲就能实现,比传统的移位算法大大节约时间-Using FPGA to achieve CRC algorithm, only one pulse will be able to realize, than the traditional algorithm greatly saving time shift
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Size: 135168 |
Author: 冯勇 |
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Description: CRC-16 VHDL Source Code
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Size: 164864 |
Author: kobin |
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Description: Altera公司高端FPGA高级综合指导手册,包括:算术运算单元,浮点处理技巧,数据编码格式转换,视频处理,仲裁逻辑,多路选择,存储逻辑,计数器,通信逻辑,循环冗余校验,随机和伪随机函数,加密和同步等编码风格和技巧;-advanced synthesis cookbook for Altera high-end FPGA(Stratix),incuding coding style and design tricks for
arithmetic,floating points operation,tranlation and format convertion,vidio, arbitor, multiplexing, registers and
memories,communication,CRC,random and pseudorandom functions,cryptography,synchronization,etc.
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Size: 962560 |
Author: 刘易 |
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Description: Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks.
External hardware accelerator is used for network packet processing. The common network tasks include CRC and Checksum calculations that are used for validation of data integrity in the network packets.
The accelerator unit is able to perform a checksum and CRC calculation autonomously without CPU interactions using a build in DMA mechanism.
-Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks.
External hardware accelerator is used for network packet processing. The common network tasks include CRC and Checksum calculations that are used for validation of data integrity in the network packets.
The accelerator unit is able to perform a checksum and CRC calculation autonomously without CPU interactions using a build in DMA mechanism.
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Size: 2506752 |
Author: Amit Adoni |
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Description: 一個CRC-12計算的串入式電路並下載至FPGA電路板-FPGA CRC-16
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Size: 1024 |
Author: TAE |
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Description: 在CPLD 或者FPGA中实现CRC,可以查找表方式或根据原理去实现-CPLD or FPGA CRC can lookup table according to the principle
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Size: 44032 |
Author: hudson |
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