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FPGA将从CY7C68013A读到的数据写入SRAM-FPGA
Update : 2010-11-17 Size : 261.68kb Publisher : wenke_521

CY7C68013的GPIF burst源程序,主要示例GPIF BURST模式的使用-Sample GPIF burst source code for CY7C68013 how to use GPIF BURST mode.
Update : 2025-02-17 Size : 38kb Publisher : 三毛

本数据包提供基于CY7C68013的开发USB的设备驱动程序代码,-the packet-based development CY7C68013 USB device driver code,
Update : 2025-02-17 Size : 91kb Publisher : lcc

BulkIn是FPGA向CY7C68013发送数据 BulkOut是FPGA从CY7C68013接收数据,可以用LED显示 -BulkIn is the FPGA to the CY7C68013 is BulkOut send data CY7C68013 receive data from the FPGA, you can use LED display
Update : 2025-02-17 Size : 259kb Publisher :

FPGA读SRAM中的数再传给CY7C68013-Reading SRAM in the FPGA, then pass on a few CY7C68013
Update : 2025-02-17 Size : 263kb Publisher :

FPGA将从CY7C68013读到的数写入SRAM-FPGA will read a few CY7C68013 write SRAM
Update : 2025-02-17 Size : 280kb Publisher :

DL : 0
CY7c68013 GPIF程序绝对可用-Procedures can be used absolutely CY7c68013 GPIF
Update : 2025-02-17 Size : 850kb Publisher : liwenxin

usb 的开发文档,非常有参考价值 详细讲述了CY7C68013的开发过程-usb development documents, a very valuable reference for a detailed account of the development process CY7C68013
Update : 2025-02-17 Size : 1.48mb Publisher : 孙译

cy7c68013向外部发送一个数据 ,发送至fpga,fpga的实例程序 -CY7C68013 to send an external data, sent to the fpga, fpga examples of procedures
Update : 2025-02-17 Size : 856kb Publisher : ones

用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
Update : 2025-02-17 Size : 2kb Publisher :

USB2_0控制器CY7C68013与FPGA接口的VerilogHDL实现.rar-CY7C68013 and FPGA controller USB2_0 interface VerilogHDL achieve. Rar
Update : 2025-02-17 Size : 357kb Publisher : fiann

DL : 0
介绍了此控制器与FPGA接口的控制和HDL (硬件描述语言)实现方法。利用CY7C68013控制器的 Slave F IFO从机方式,用Verilog HDL在FPGA中产生相应的控制信号,实现对数据的快速读写。试验 结果表明此方案传输速度快、数据准确,可扩展到其他需要通过USB进行快速数据传输的系统中-This paper describes the controller and the FPGA interface to control and HDL (hardware description language) implementations. Use CY7C68013 controller Slave F IFO slave mode, using Verilog HDL in the FPGA generate a corresponding control signal to achieve fast read and write data. The results show that this program transmission speed, accurate data can be expanded to other needs through the USB for fast data transfer system
Update : 2025-02-17 Size : 357kb Publisher : 余岳衡

USB2.0的Verilog实现,含有完整的FPGA代码-Use Verilog to implement the USB2.0 protcol
Update : 2025-02-17 Size : 586kb Publisher : XCP

CY7C68013固件 FPGA把数据通过usb写入pc slave 模式 使用 EP6 -USB:FPGA write data to PC by USB change from cypress example slave mode and use EP6 bulkloop.c firmware based on the firmware frameworks. Building this example requires the full version of the Keil Tools.
Update : 2025-02-17 Size : 162kb Publisher : shenjianfei

该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序,FPGA上的VERILOG通信程序。-The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program
Update : 2025-02-17 Size : 6.82mb Publisher : 梁先国

USB控制芯片cy7c68013与FPGA通过slave fifo方式通信,块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
Update : 2025-02-17 Size : 939kb Publisher : 张新

cy7c68013结合FPGA的开发笔记,本人原创,FPGA平台是DE2-cy7c68013+fpga develop note
Update : 2025-02-17 Size : 405kb Publisher : caizuhong

CY7C68013固件程序 FPGA测试Verilog程序(CY7C68013 firmware, FPGA test, Verilog)
Update : 2025-02-17 Size : 194kb Publisher : regan_wang

CY7C68013固件程序以及 FPGA测试Verilog程序,源代码(CY7C68013 firmware program FPGA test Verilog program, source code)
Update : 2025-02-17 Size : 194kb Publisher : 任小刀

Keil 完成的固件。成功实现ARM与 FPGA的通讯(CY7C68013 IMX6+FPGA + KEIL)
Update : 2025-02-17 Size : 181kb Publisher : showlinux
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