Search - fpga fsk

[Other resource] fpga-example2

Description: ASK调制与解调VHDL程序及仿真 FSK调制与解调VHDL程序及仿真 PSK调制与解调VHDL程序及仿真基带码发生器程序设计与仿真频率计程序设计与仿真-ASK modulation and demodulation VHDL simulation procedures and FSK modulation and demodulation process and VHDL simulation PSK modulation and demodulation process and VHDL simulation baseband code generator program design and simulation Cymometer program design and simulation
Platform: | Size: 618922 | Author: 张伟 | Hits:

[Other resource] FSK

Description: 用vhdl写的fpga移频键控程序，控制灵活,完整工程
Platform: | Size: 271653 | Author: wanyou | Hits:

[VHDL-FPGA-Verilog] fpga-example2

Description: ASK调制与解调VHDL程序及仿真 FSK调制与解调VHDL程序及仿真 PSK调制与解调VHDL程序及仿真基带码发生器程序设计与仿真频率计程序设计与仿真-ASK modulation and demodulation VHDL simulation procedures and FSK modulation and demodulation process and VHDL simulation PSK modulation and demodulation process and VHDL simulation baseband code generator program design and simulation Cymometer program design and simulation
Platform: | Size: 618496 | Author: 张伟 | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407552 | Author: 刘斐 | Hits:

[File Format] FPGA_27eg

Description: FPGA很有价值的27实例.rar 包括 LED控制VHDL程序与仿真 2004.8修改.doc； LED控制VHDL程序与仿真； LCD控制VHDL程序与仿真 2004.8修改； LCD控制VHDL程序与仿真； ADC0809 VHDL控制程序； TLC5510 VHDL控制程序； DAC0832 接口电路程序； TLC7524接口电路程序； URAT VHDL程序与仿真； ASK调制与解调VHDL程序及仿真； FSK调制与解调VHDL程序及仿真； PSK调制与解调VHDL程序及仿真； MASK调制VHDL程序及仿真； MFSK调制VHDL程序及仿真； MPSK调制与解调VHDL程序与仿真；基带码发生器程序设计与仿真；频率计程序设计与仿真；采用等精度测频原理的频率计程序与仿真；电子琴程序设计与仿真 2004.8修改；电子琴程序设计与仿真；电梯控制器程序设计与仿真；电子时钟VHDL程序与仿真；自动售货机VHDL程序与仿真；出租车计价器VHDL程序与仿真 2004.8修改；出租车计价器VHDL程序与仿真；波形发生程序；步进电机定位控制系统VHDL程序与仿-FPGA value of the 27 examples. Rar including LED control procedures and VHDL simulation 200 4.8 amendments. doc; LED control procedures and VHDL simulation; LCD control procedures and VHDL simulation 2004.8 modified; LCD control procedures and VHDL simulation; Connection between ADC 0809 VHDL control procedures; TLC5510 VHDL control procedures; DAC0832 interface circuits; TLC7524 interface circuits; URAT procedures and VHDL simulation; ASK modulation and demodulation process and VHDL simulation; FSK modulation and demodulation process and VHDL simulation; PSK modulation and demodulation process and VHDL simulation; MASK modulation procedures and VHDL simulation; MFSK modulation procedures and VHDL simulation; MPSK modulation and demodulation process and VHDL simulation; Base-band code gene
Platform: | Size: 1278976 | Author: 高 | Hits:

[matlab] Application_in_FPGA_design_of_Matlab_simulink

Description: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点，然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim 中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method.
Platform: | Size: 275456 | Author: 普林斯 | Hits:

[VHDL-FPGA-Verilog] FSK

Description: 用vhdl写的fpga移频键控程序，控制灵活,完整工程-FPGA using VHDL written FSK procedures, control of a flexible, complete works
Platform: | Size: 271360 | Author: wanyou | Hits:

[VHDL-FPGA-Verilog] fpga-fpdpsk

Description: FSK/PSK调制顶层文件，正弦波模块，正弦波模块初始化文件，振幅调整及波形选择模块，频率显示值地址产生模块，频率步进键核心模块，弹跳消除电路-FSK/PSK modulation top-level documents, sine-wave modules, module initialization file sine wave, amplitude adjustment and waveform selection module, the frequency of the displayed value address generator module, the frequency of stepping key core modules, bouncing the elimination of circuit
Platform: | Size: 27648 | Author: libing | Hits:

[VHDL-FPGA-Verilog] elecfans.com-74783742

Description: FPGA的重要实例,如PSK调制和解调,ASK,FSK-An important example of FPGA, such as PSK modulation and demodulation, ASK, FSK
Platform: | Size: 1278976 | Author: 钟莉 | Hits:

[Embeded-SCM Develop] 2FSK

Description: 基于FPGA的2FSK信号发生器的设计.doc-DesignofBasebandSignalGeneratorBasedonFPGA
Platform: | Size: 265216 | Author: 秦雄华 | Hits:

[OS program] fsk

Description: 关于FSK调制的FPGA实现，有VHDL源码-FSK modulation on the FPGA, a VHDL source code
Platform: | Size: 141312 | Author: 123 | Hits:

[VHDL-FPGA-Verilog] FSK

Description: 基于FPGA的FSK的调制解调程序 VHDL-FPGA-based FSK modulation and demodulation process of VHDL
Platform: | Size: 4096 | Author: 张海龙 | Hits:

[VHDL-FPGA-Verilog] 2-fsk

Description: 2-fsk调制解调的fpga实现。two-fsk为调制程序，fsk-two为解调程序。-2-fsk modulation and demodulation of fpga implementation. two-fsk for the modulation process, fsk-two for the demodulation process.
Platform: | Size: 1024 | Author: 张维 | Hits:

[VHDL-FPGA-Verilog] FSK

Description: 频移键控FSK的Verilog实现，带测试文件，并在FPGA开发板上成功验证-Frequency Shift Keying FSK the Verilog implementation, with the test file, and successfully verified in FPGA development board
Platform: | Size: 41984 | Author: wang | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA的通信系统调制解调，包括理论知识介绍和VHDL程序。包含2ASK ,2FSK，2PSK -FPGA-based modem communication systems, including the introduction of theoretical knowledge and the VHDL program. Contains 2ASK, 2FSK, 2PSK
Platform: | Size: 607232 | Author: songlina | Hits:

[VHDL-FPGA-Verilog] FSK

Description: 利用FPGA内的IP核来实现FSK，Using FPGA to realize the IP core FSK。-Using FPGA to realize the IP core FSK,
Platform: | Size: 111616 | Author: LI | Hits:

[Other] FSK

Description: 首先利用IP核记录sin和con波形，然后进行FSK调制，信息为数字信息(Firstly, the IP kernel is used to record the sin and con waveforms, and then the FSK is modulated, and the information is digital information)
Platform: | Size: 4807680 | Author: Lzzz18 | Hits:

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[Other resource] fpga-example2

[Other resource] FSK

[VHDL-FPGA-Verilog] fpga-example2

[Embeded-SCM Develop] SIN_fashengqi

[File Format] FPGA_27eg

[matlab] Application_in_FPGA_design_of_Matlab_simulink

[VHDL-FPGA-Verilog] FSK

[VHDL-FPGA-Verilog] fpga-fpdpsk

[VHDL-FPGA-Verilog] elecfans.com-74783742

[Embeded-SCM Develop] 2FSK

[OS program] fsk

[VHDL-FPGA-Verilog] FSK

[VHDL-FPGA-Verilog] 2-fsk

[VHDL-FPGA-Verilog] FSK

[VHDL-FPGA-Verilog] FPGA

[VHDL-FPGA-Verilog] FSK

[Other] FSK

[VHDL-FPGA-Verilog] 27个FPGA实例源代码

[Communication-Mobile] FpgaFskMod

[Program doc] FpgaFskDemod

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