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[source in ebook16fft_vhdl.ZIP

Description: 一个用FPGA实现的16FFT,仅供参考不作为工程文件-with an FPGA 16FFT, not only as a reference document projects
Platform: | Size: 266240 | Author: 武第 | Hits:

[VHDL-FPGA-VerilogstudyFFTcore

Description: 调用FPGA的IP核实现FFT运算,在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
Platform: | Size: 1287168 | Author: 徐成发 | Hits:

[Communication-Mobilefft_ifft_vhdl_codes

Description: this will give details of fft and ifft implementation in vhdl codes, and then on fpga chip
Platform: | Size: 3760128 | Author: ARUN AGARWAL | Hits:

[Software EngineeringTheResearchoftherealtimesignalprocessingofSARbased

Description: 3.完成系统的FPGA程序开发与调试,主要包括FFT,IFFT,CMUL和转置 存储控制等模块,在此基础上,重点介绍了一种基于DDR SDRAM的行写行读高 效转置存储算法,在采用该算法进行转置存储操作时,读写两端的速度相匹配, 满足流水线操作要求,提高了整个系统的实时性。最后介绍了采用CORDIC算法 实现复图像求模运算的方法,分析了算法的硬件实现结构,并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging are implemented,including FFT, IFFT, CMUL and C0ntrol of CTM.Based Oll this,Implementation of a high efficient corner turn memory arithmetic with writing and reading by row based on DDR SDRAM is introduced.When using CTM with this algorithm,me speed of reading and writing maItches and meets the requirement of pipelined operation.Finally a method of model implementation for complex image based on CORDIC algorithm is introduced.The algorithm’s hardware implementation structure is analysed, and implementation methodology and simulation results are given
Platform: | Size: 5155840 | Author: mabeibei | Hits:

[Software EngineeringIFFT(FPGA)

Description: 用QUARTUS软件开发,基于FPGA的IFFT处理器设计。-With QUARTUS software development, the IFFT processor based on FPGA design.
Platform: | Size: 182272 | Author: 天一生水 | Hits:

[VHDL-FPGA-Verilogfpga_imp_ifft_ieee_papers1

Description: ifft ieee papers , specially fpga implementation of ifft module , i get after search ifft in search tool bar ,i download a-ifft ieee papers , specially fpga implementation of ifft module , i get after search ifft in search tool bar ,i download all
Platform: | Size: 6078464 | Author: mansih | Hits:

[VHDL-FPGA-VerilogFPGA_implementation_FFTIFFT

Description: 一篇关于使用VHDL在FPGA上实现FFT//IFFT的文章-Anarticle about Efficient FPGA implementation of FFT/IFFT processing
Platform: | Size: 593920 | Author: Victor | Hits:

[Documentsfft

Description: fft AND ifft is designed for OFDM application using CORDIC algorithm and implemented in XILINX FPGA.
Platform: | Size: 206848 | Author: pert | Hits:

[VHDL-FPGA-VerilogIFFT

Description: FPGA实现IFFT模块,verilog源码-FPGA implementation IFFT module, verilog source
Platform: | Size: 423936 | Author: 阿毛 | Hits:

[Post-TeleCom sofeware systemsIFFT

Description: 基于OFDM的FPGA设计的IFFT设计-The FPGA design of IFFT design based on OFDM
Platform: | Size: 29696 | Author: daixi | Hits:

[VHDL-FPGA-VerilogTOP

Description: IFFT快速傅里叶逆变换的FPGA实现,IFFT的实现-IFFT fast Fourier inverse transformation of the FPGA implementation
Platform: | Size: 1024 | Author: lzx | Hits:

[3G developturbo_code

Description: LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink⃝ R with Xilinx⃝ R System Generator plugin. A MATLAB⃝ R script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB⃝ R .
Platform: | Size: 11264 | Author: mezo | Hits:

[Communication-Mobileturbo_lte_ofdm_fpga_code

Description: LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink⃝ R with Xilinx⃝ R System Generator plugin. A MATLAB⃝ R script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB⃝ R .
Platform: | Size: 11264 | Author: mezo | Hits:

[Communication-MobilefinalTURBOCODE_OFDM

Description: Throughout the project the LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink R ⃝ with Xilinx R ⃝ System Generator plugin. A MATLAB R ⃝ script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB R ⃝ .-Throughout the project the LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator and a 16 point IFFT on an FPGA using MATLAB Simulink R ⃝ with Xilinx R ⃝ System Generator plugin. A MATLAB R ⃝ script is developed to test the Simulink implementation. In addition, an iterative Turbo decoder is programmed using MATLAB R ⃝ .
Platform: | Size: 2099200 | Author: mezo | Hits:

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