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[Other resource] FPGA-SD DL : 0: 基于FPGA的SD转换器的设计与实现，已经在实际项目中测试过，完全OK！
Update : 2008-10-13 Size : 128.82kb Publisher : laozhang
[Other resource] FPGA-SD-COMMUNICATION DL : 0: 基于QUARTUSII软件实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信所用语言位verilog HDL
Update : 2008-10-13 Size : 4.83mb Publisher : chenbinjie
[SourceCode] verilog SD DL : 0: Update : 2011-03-22 Size : 1.12mb Publisher : f53730436@163.com
[SourceCode] SD控制器和SPI控制器 DL : 0: 基于fpga的verilog 收到卡读写程序
Update : 2012-01-24 Size : 4.56mb Publisher : lvlovelive
[Embeded-SCM Develop] sd_ctl_nios DL : 0: 基于FPGA的SD控制器实现.目前实现读操作功能,可作参考.-FPGA-based SD controller. Nowadays Reading the functions, reference can be made.
Update : 2025-02-17 Size : 8kb Publisher : zhou
[Embeded-SCM Develop] SD_Card_Audio DL : 0: 一个基于FPGA的SD卡读写程序，QII综合。希望有用。-FPGA-based SD card reader program, QII integrated. I hope useful.
Update : 2025-02-17 Size : 11.68mb Publisher : zlw
[SCM] FPGA-SD DL : 0: 基于FPGA的SD转换器的设计与实现，已经在实际项目中测试过，完全OK！-Conversion of SD-based FPGA Design and Implementation, has been tested in actual projects, and completely OK!
Update : 2025-02-17 Size : 129kb Publisher : laozhang
[VHDL-FPGA-Verilog] vga_system DL : 0: FPGA读写SDRAM的实例，可以当作IPcore来添加，非常有价值的的程序。-FPGA examples SDRAM read and write, can be used as IPCore to add, a very valuable process.
Update : 2025-02-17 Size : 20.4mb Publisher : 陈泸华
[VHDL-FPGA-Verilog] FPGA-SD-COMMUNICATION DL : 0: 基于QUARTUSII软件实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信所用语言位verilog HDL-QUARTUSII software implementation based on FPGA (ATERA CYCLONE II series) with SD Card SD mode digital communication language verilog HDL
Update : 2025-02-17 Size : 4.83mb Publisher : chenbinjie
[SCM] sd_spi DL : 0: SD卡SPI模式下的中文译本，在网上找了很久才找到的，希望对各位有帮助-SPI mode of SD card under the Chinese translation of the Internet to find for a long time to find the hope you will help
Update : 2025-02-17 Size : 1.74mb Publisher : 李杰
[Other] sd_IP DL : 0: SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck-SD card controller can just read data using 1 bit SD mode.I have written this core for NIOS2 CPU, Cyclone, but I think it can workswith other FPGA or CPLD. Better case for this core is SD clock = 20 MHz andCPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core.Good luck
Update : 2025-02-17 Size : 8kb Publisher : tuya
[ARM-PowerPC-ColdFire-MIPS] SDCard_test DL : 0: SD卡的SPI驱动程序，已在Nios2 IDE 中调试成功-SD card SPI driver, has been successful Nios2 IDE in debug
Update : 2025-02-17 Size : 24kb Publisher : jzt
[VHDL-FPGA-Verilog] C20_SD DL : 0: FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
Update : 2025-02-17 Size : 1.12mb Publisher : 钟灶生
[Other Embeded program] sd_MP3 DL : 0: SD卡作为存储器，FPGA作为处理器，sta013作为解码芯片，实现mp3播放，文件系统为fat16-SD memory card as, FPGA as a processor, sta013 as a decoder chip, the realization of mp3 player, file system to fat16
Update : 2025-02-17 Size : 241kb Publisher : 刘小平
[VHDL-FPGA-Verilog] ActelFPGA_HE_ApplicationNote DL : 0: 在手持式设备的应用中(包括智能电话、相机和 MP3 播放器)，用户大多考虑低功耗、小尺寸，整个系统中除了处理器外，往往需要提供多种通信接口与存储器接口，用于实现对硬盘、SD 卡、CF 卡以及 USB 的通信等，用 FPGA 来实现这些接口将会是一种理想的解决方案。本方案采用 Actel 低功耗的 IGLOO 系列作为处理器(PXA270 或 ARM)的桥接器件和设备控制器，不仅能够大大简化处理器设计的复杂度，而且 IGLOO 的超低功耗 (最小 5μ W)以及超小封装(4mm*4mm)给手持式产品带来了前所未有的。 -In the application of handheld devices (including smart phone, camera and MP3 players), users are considering low-power, Small size, the whole system in addition to the processor, usually need to provide various communication interface and storage interface, used to implement Hard disk, SD card, CF card and USB communication, etc, to realize these interfaces with FPGA will be an ideal solution Scheme. The scheme adopts Actel IGLOO of low power consumption PXA270 processor (series as a bridge or ARM) devices and Equipment controller, can not only greatly simplified, and the complexity of the processor design IGLOO of low power consumption (minimum 5 mu W) and small package (4mm 4mm*) for handheld product has brought an unprecedented.
Update : 2025-02-17 Size : 237kb Publisher : zxx359654879
[Embeded-SCM Develop] Pelmanism.tar DL : 0: FPGA reading JPEG pictures from SD card
Update : 2025-02-17 Size : 3.87mb Publisher : lo
[VHDL-FPGA-Verilog] SD-card-controller-used--FPGA DL : 0: SD卡控制器的FPGA实现 -SD card controller FPGA to achieve SD card controller FPGA implementation
Update : 2025-02-17 Size : 251kb Publisher : liujie
[VHDL-FPGA-Verilog] FPGA_Audio_Player DL : 0: Altera FPGA SD卡播放音乐程序，基于Nios，强力推荐！-Altera FPGA SD card music program, based on the Nios, highly recommended!
Update : 2025-02-17 Size : 592kb Publisher : 任力争
[VHDL-FPGA-Verilog] SD DL : 0: Altera DE0 FPGA的SD卡读取程序，强力推荐！ -Altera DE0 FPGA SD card reader, highly recommended!
Update : 2025-02-17 Size : 1.87mb Publisher : 任力争
[VHDL-FPGA-Verilog] sd_test DL : 0: 基于FPGA的SD卡初始化、读写，实现向FPGA写入数据并读取(SD card initialization, reading and writing, with FPGA based)
Update : 2025-02-17 Size : 2.09mb Publisher : 芬达sy

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