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[Other resource] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776642 | Author: 张涛 | Hits:

[Other resource] SRAM_2

Description: FPGA的SDRAM控制器源程序 FPGA的SDRAM控制器源程序-FPGA SDRAM controller source FPGA SDRAM controller source
Platform: | Size: 554116 | Author: zlw | Hits:

[VHDL-FPGA-Verilog] Verilog&Vhdl混语言对SDRAM的控制源代码

Description: Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
Platform: | Size: 249856 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776192 | Author: 张涛 | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_Controller

Description: DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Platform: | Size: 677888 | Author: 钟方 | Hits:

[VHDL-FPGA-Verilog] my_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19456 | Author: 朱效志 | Hits:

[MPI] SRAM_2

Description: FPGA的SDRAM控制器源程序 FPGA的SDRAM控制器源程序-FPGA SDRAM controller source FPGA SDRAM controller source
Platform: | Size: 553984 | Author: zlw | Hits:

[Other] ref-sdr-sdram-vhdl

Description: FPGA连接SDRAM的源程序，VHDL语言实现，功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
Platform: | Size: 732160 | Author: young | Hits:

[SCM] source_code

Description: 一些源程序，主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等-Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, such as radar target simulator
Platform: | Size: 6898688 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] burstpage

Description: SDRAM控制器在FPGA实现源代码，能实现burst传输-SDRAM controller in FPGA realization of the source code, can achieve burst transfer
Platform: | Size: 253952 | Author: 弘历 | Hits:

[VHDL-FPGA-Verilog] FPGA_SDRAM

Description: FPGA对SDRAM的控制操作源码,用VERILOG硬件描述语言编写,包含的文件一共有:hostcont.v,inc.h,pinouts.ucf,sdram.v,top.v,tst_inc.h-Control of operation of the SDRAM FPGA source code, using VERILOG hardware description language, the file contains a total of: hostcont.v, inc.h, pinouts.ucf, sdram.v, top.v, tst_inc.h
Platform: | Size: 21504 | Author: 陈维 | Hits:

[VHDL-FPGA-Verilog] sdram-source

Description: SDR SDRAM 控制器的源代码 altera公司的-source code from altera
Platform: | Size: 717824 | Author: wela | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 这是针对FPGA的一个文档，内有SDRAM的源代码，对于学习SDRAM很有帮助。-This is a document for the FPGA, the source code within the SDRAM, SDRAM useful for the study.
Platform: | Size: 2191360 | Author: 欧阳柏林 | Hits:

[VHDL-FPGA-Verilog] fpgaexperiment_sourcecode

Description: FPGA实现七个实验的源程序。SDRAM测试，按键及PIO口中断实验，定时器实验，seg7实验，sopc_led实验，flash烧写，fpga_led，锁相环。-FPGA realization of the seven experiments of the source. SDRAM test, test buttons and PIO port interrupt, timer experiment, seg7 experiment, sopc_led test, flash programming, fpga_led, PLL.
Platform: | Size: 12833792 | Author: Air | Hits:

[VHDL-FPGA-Verilog] FPGA-SDRAM-read-and-write-examples

Description: FPGA读写SDRAM的实例，内含源代码，希望对大家有帮助。-FPGA SDRAM read and write examples, including source code, we want to help.
Platform: | Size: 19932160 | Author: haby | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 用FPGA实现对sdram读写的源代码，芯片用的是Altera公司的，需要的同学可以看看！-FPGA realization of sdram read and write the source code, the chip using Altera' s, students need to take a look!
Platform: | Size: 521216 | Author: zhachshen | Hits:

[VHDL-FPGA-Verilog] sdram_hr_hw_4port

Description: FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
Platform: | Size: 2339840 | Author: 刘成岩 | Hits:

[VHDL-FPGA-Verilog] source

Description: FPGA SDRAM存储器控制，所有源码数据包-FPGA SDRAM memory controller, all source data packets
Platform: | Size: 12288 | Author: lihuajin | Hits:

[VHDL-FPGA-Verilog] FPGA_DDR-SDRAM

Description: FPGA对SDRAM的控制，有部分源码，-FPGA SDRAM control, part of the source,...
Platform: | Size: 5399552 | Author: | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: FPGA上实现SDRAM初始化及控制源程序-Implemented on FPGA SDRAM initialization and control source
Platform: | Size: 5035008 | Author: 李丽 | Hits:
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