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[VHDL-FPGA-Verilog] videodigitalsignalscontroller DL : 1: 用fpga技术实现基本的视频信号处理：主题程序；视频图象数据采集程序；sram的读写控制；测试程序-they simply use the basic technology of video signal processing : theme; Video data acquisition procedures; SRAM literacy control; test procedures
Update : 2025-02-17 Size : 8kb Publisher : yan
[VHDL-FPGA-Verilog] CY7c68013_FPGA_Read_Sram DL : 0: FPGA读SRAM中的数再传给CY7C68013-Reading SRAM in the FPGA, then pass on a few CY7C68013
Update : 2025-02-17 Size : 263kb Publisher : 简
[VHDL-FPGA-Verilog] CY7c68013_fpga_write_sram DL : 0: FPGA将从CY7C68013读到的数写入SRAM-FPGA will read a few CY7C68013 write SRAM
Update : 2025-02-17 Size : 280kb Publisher : 简
[VHDL-FPGA-Verilog] FPGA_write_sram DL : 0: FPGA向SRAM中写入数据，VHDL编程-FPGA to the SRAM write data, VHDL programming
Update : 2025-02-17 Size : 256kb Publisher : 简
[VHDL-FPGA-Verilog] SRAM DL : 0: Update : 2025-02-17 Size : 1kb Publisher :
[Software Engineering] FPGA_SDR_Sdram_LED DL : 0: 针对主控制板上存储器(SRAM) 存储的数据量小和最高频率低的情况,提出了基于SDR Sdram(同步动态RAM) 作为主存储器的LED 显示系统的研究。在实验中,使用了现场可编程门阵列( FPGA) 来实现各模块的逻辑功能。最终实现了对L ED 显示屏的控制,并且一块主控制板最大限度的控制了256 ×128 个像素点,基于相同条件,比静态内存控制的面积大了一倍,验证了动态内存核[7 ]的实用性。-For the main control board memory (SRAM) a small amount of stored data and the highest frequency of low, based on SDR Sdram (Synchronous Dynamic RAM) as the main memory of the LED display systems. In the experiment, the use of field programmable gate array (FPGA) to realize the logic function of each module. The eventual realization of L ED display control, and a master control panel to maximize the control of the 256 × 128 pixels point, based on the same conditions than the static memory control area has doubled, to verify the dynamic memory of nuclear [7 ] the practicality.
Update : 2025-02-17 Size : 499kb Publisher : 郑宏超
[VHDL-FPGA-Verilog] sram_control DL : 0: verilog编写fpga与片外SRAM通信模块-Verilog FPGA with the preparation of SRAM chip communication module
Update : 2025-02-17 Size : 409kb Publisher : 宇天
[VHDL-FPGA-Verilog] sram DL : 0: FPGA向SRAM中写入数据(VHDL编程)，包含通用fifo，sram等-FPGA to the SRAM write data (VHDL programming), contains general fifo, sram, etc.
Update : 2025-02-17 Size : 264kb Publisher : 王刚
[VHDL-FPGA-Verilog] FGPA-SRAM-Programe DL : 0: FPGA编程方法介绍，方便学习VHDL,公供大家参考-fpga programe medoth, study hardware vhdl language
Update : 2025-02-17 Size : 2kb Publisher : richardz
[Other] fpga-based-system-design-chapter3 DL : 0: In this chapter we will study the basic structures of FPGAs, known as fabrics. We will start with a brief introduction to the structure of FPGA fabrics. However, there are several fundamentally different ways to build an FPGA. Therefore, we will discuss combinational logic and interconnect for the two major styles of FPGA: SRAM-based and antifuse-based. The features of I/O pins are fairly simi- lar among these two types of FPGAs, so we will discuss pins at the end of the chapter.
Update : 2025-02-17 Size : 379kb Publisher : Frank
[VHDL-FPGA-Verilog] sram DL : 0: 基于FPGA的SRAM控制程序，里面附加了在线逻辑分析功能的程序，调试时相当的方便-SRAM-based FPGA-control program, which added an online feature of the program logic analysis, debugging very convenient when
Update : 2025-02-17 Size : 1.67mb Publisher : 李成有
[VHDL-FPGA-Verilog] sram DL : 0: SRAM控制器，含整个工程 vSRAM控制器，含整个工程 SRAM控制器，含整个工程-SRAM SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM
Update : 2025-02-17 Size : 231kb Publisher : leee
[VHDL-FPGA-Verilog] sram DL : 0: a verilog sram code. use it to manipulate sram on fpga
Update : 2025-02-17 Size : 1kb Publisher : DCLAB
[VHDL-FPGA-Verilog] SRAM DL : 0: FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
Update : 2025-02-17 Size : 1kb Publisher : pan
[VHDL-FPGA-Verilog] SRAM-FPGA DL : 0: 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control
Update : 2025-02-17 Size : 13kb Publisher : austin
[VHDL-FPGA-Verilog] Verilog-SRAM DL : 0: 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
Update : 2025-02-17 Size : 56kb Publisher : yishuihan
[VHDL-FPGA-Verilog] use-CPLD-SRAM--driving-TFT-lcd DL : 0: 用CPLD+SRAM驱动数字TFT屏的例子，希望对大家有所帮助-With CPLD+ SRAM drive digital TFT screen example, we want to help
Update : 2025-02-17 Size : 2kb Publisher : dengde
[Other] FPGA-SRAM DL : 0: FPGA 实验、SRAM 读写实验，达尔EDA 实验室EP2C5 型或EP2C8 型FPGA/SOPC 实验板—dl2c58c_v3-Experimental FPGA, SRAM read and write experimental, Total the EDA lab EP2C5 type or the EP2C8 type FPGA/SOPC experimental board-dl2c58c_v3
Update : 2025-02-17 Size : 235kb Publisher : sb
[VHDL-FPGA-Verilog] Sram(v0.2.20090115) DL : 0: SRAM FPGA编程 CYLOON2系列均可使用-SRAM FPGA programming CYLOON2 series can be used
Update : 2025-02-17 Size : 11.22mb Publisher : simon greenhall
[VHDL-FPGA-Verilog] sram DL : 0: FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)
Update : 2025-02-17 Size : 1.32mb Publisher : bin_mm3

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