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Description: iic slave verilog hdl code
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Size: 1590 |
Author: hrui |
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Description: iic slave verilog hdl code
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Size: 1024 |
Author: hrui |
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Description: 基于verilog hdl 的iic实现源码,值得学习-Iic-based realization of the verilog hdl source, it is worth learning
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Size: 892928 |
Author: wxd |
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Description: verilog HDL
i2c主机代码-verilog HDL i2c host code
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Size: 1024 |
Author: 李爱国 |
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Description: FPGA Verilog HDL模拟IIC通讯接口-FPGA Verilog HDL IIC Interface
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Size: 204800 |
Author: wolf |
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Description: 本帖最后由 NovaCao 于 1-18-2009 18:02 编辑
使用Quartus II进行仿真
QQ:44425312
QQ群:50585234(群名称:FPGA4u)
gtalk:fpgaforu@gmail.com
网站:www.fpga4u.com
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我们以一个计数器为例,在QuartusII中对其进行仿真。
打开Quartus II,新建一个工程,新建Verilog HDL文件
-This quote was last NovaCao on 1-18-2009 18:02 by editing the use of Quartus II simulation QQ: 44425312 QQ Group: 50,585,234 (group name: FPGA4u) gtalk: fpgaforu@gmail.com Website: www.fpga4u.com Taobao shop : http://shop34914329.taobao.com/ us to a counter example, in QuartusII in its simulation. Open the Quartus II, create a new project, the new Verilog HDL files
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Size: 5120 |
Author: 倪萍波 |
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Description: 用Verilog HDL语言实现串口异步通信-With the Verilog HDL language serial asynchronous communication
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Size: 3072 |
Author: 张微 |
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Description: 一种IIC的vhdl实现,包含相关sourcecode和协议文档,学习verilog hdl的好资料。-A kind of IIC' s vhdl implementation, the agreement contains the relevant sourcecode and documentation, learning verilog hdl good information.
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Size: 38912 |
Author: cabrave |
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Description: 用标准Verilog HDL 语言编写的IIC总线IP核,详细定义了时序及输入输出, 可以直接应用-Standard Verilog HDL language of the IIC bus IP core, a detailed definition of the timing and the input and output, can be applied directly
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Size: 3072 |
Author: 吴梁辛 |
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Description: 基于VERILOG HDL的IIC设计,比较基础,设计适合初学者-IIC INTERFCAE DESIGN
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Size: 2048 |
Author: 何文忠 |
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Description: iic verilog hdl 源程序 实例及顶层测试文件
经典代码 来自特权同学-iic verilog hdl source code top test file
interface design and testing procedures
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Size: 75776 |
Author: 杨泽钰 |
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Description: 本程序是基于verilog HDL的iic程序,需要的下载-This procedure is based on the Verilog HDL IIC procedures, the need to download
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Size: 453632 |
Author: 李炯 |
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Description: IIC通信机制的Verilog HDL实现,IIC是一种串行通信总线,它可以提供为设备间的通信提供一种简单有效的方式-IIC communication mechanism of Verilog HDL implementation, I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices。
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Size: 1479680 |
Author: 张居林 |
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Description: 这是我编写的FPGA控制IIC的程序,用来配置型号为24C02的EEPROM,已经通过验证。-This is my own Verilog HDL program for IIC control, it can configure the EEPROM named 24C02, and the program have been tested.
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Size: 2048 |
Author: 陈波 |
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Description: 用FPGA verilog HDL模拟I2C通信-FPGA verilog HDL simulation I2C communication
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Size: 797696 |
Author: 高飞 |
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Description: iic协议 用verilog hdl语言,可以在xilinx ise软件 编译 综合-iic agreement verilog hdl language can be compiled in xilinx ise software integrated
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Size: 1024 |
Author: Andy |
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Description: 本文档详细的讲述了如何使用Verilog HDL驱动iic,内容比较好,对你一定有所帮助-This document describes in detail how to use Verilog HDL drive iic, the content is good, you will certainly be helpful
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Size: 189440 |
Author: lingxiao |
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Description: iic协议的功能实现verilog HDL代码,并用7段数码管进行验证,压缩包内含有整个工程文件。-function iic protocol implementation verilog HDL code and seven-segment LED to verify, compressed package file containing the entire project.
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Size: 439296 |
Author: 张晶晶 |
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Description: 使用verilog HDL编写IIC代码,通过FPGA读取mpu6050数据,其他IIC器件代码类似-IIC written using verilog HDL code, read mpu6050 data through FPGA, similar to other IIC device code
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Size: 2048 |
Author: 陈孙杰 |
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Description: quartus ii 实时时钟pcf8563工程及源码
Verilog hdl 实现iic总线-quartusii realtime pcf8563 project and code and IIC verilog hdl
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Size: 74752 |
Author: zhaoyulong |
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